[llvm] r327020 - AMDGPU/GlobalISel: Pass subtarget + TM to LegalizerInfo
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 8 08:24:17 PST 2018
Author: arsenm
Date: Thu Mar 8 08:24:16 2018
New Revision: 327020
URL: http://llvm.org/viewvc/llvm-project?rev=327020&view=rev
Log:
AMDGPU/GlobalISel: Pass subtarget + TM to LegalizerInfo
These are the parameters x86 already uses.
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp?rev=327020&r1=327019&r2=327020&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp Thu Mar 8 08:24:16 2018
@@ -23,7 +23,8 @@
using namespace llvm;
using namespace LegalizeActions;
-AMDGPULegalizerInfo::AMDGPULegalizerInfo() {
+AMDGPULegalizerInfo::AMDGPULegalizerInfo(const SISubtarget &ST,
+ const GCNTargetMachine &TM) {
using namespace TargetOpcode;
const LLT S1= LLT::scalar(1);
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.h?rev=327020&r1=327019&r2=327020&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.h Thu Mar 8 08:24:16 2018
@@ -19,12 +19,15 @@
namespace llvm {
+class GCNTargetMachine;
class LLVMContext;
+class SISubtarget;
/// This class provides the information for the target register banks.
class AMDGPULegalizerInfo : public LegalizerInfo {
public:
- AMDGPULegalizerInfo();
+ AMDGPULegalizerInfo(const SISubtarget &ST,
+ const GCNTargetMachine &TM);
};
} // End llvm namespace.
#endif
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp?rev=327020&r1=327019&r2=327020&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp Thu Mar 8 08:24:16 2018
@@ -367,12 +367,12 @@ R600Subtarget::R600Subtarget(const Tripl
TLInfo(TM, *this) {}
SISubtarget::SISubtarget(const Triple &TT, StringRef GPU, StringRef FS,
- const TargetMachine &TM)
+ const GCNTargetMachine &TM)
: AMDGPUSubtarget(TT, GPU, FS, TM), InstrInfo(*this),
FrameLowering(TargetFrameLowering::StackGrowsUp, getStackAlignment(), 0),
TLInfo(TM, *this) {
CallLoweringInfo.reset(new AMDGPUCallLowering(*getTargetLowering()));
- Legalizer.reset(new AMDGPULegalizerInfo());
+ Legalizer.reset(new AMDGPULegalizerInfo(*this, TM));
RegBankInfo.reset(new AMDGPURegisterBankInfo(*getRegisterInfo()));
InstSelector.reset(new AMDGPUInstructionSelector(
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h?rev=327020&r1=327019&r2=327020&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h Thu Mar 8 08:24:16 2018
@@ -705,7 +705,7 @@ private:
public:
SISubtarget(const Triple &TT, StringRef CPU, StringRef FS,
- const TargetMachine &TM);
+ const GCNTargetMachine &TM);
const SIInstrInfo *getInstrInfo() const override {
return &InstrInfo;
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