[PATCH] D44245: Propagate flags to SDValue in SplitVecOp_VECREDUCE

[Sameer AbuAsal via Phabricator via llvm-commits]

sabuasal created this revision.
sabuasal added reviewers: llvm-commits, aemerson, jmolloy.

This patch is a proposed fix for 36642.

While legalizing long vector types, make sure the smaller types get the
flags of the wider type.


https://reviews.llvm.org/D44245

Files:
  lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp


Index: lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -1694,8 +1694,8 @@
 
   // Use the appropriate scalar instruction on the split subvectors before
   // reducing the now partially reduced smaller vector.
-  SDValue Partial = DAG.getNode(CombineOpc, dl, LoOpVT, Lo, Hi);
-  return DAG.getNode(N->getOpcode(), dl, ResVT, Partial);
+  SDValue Partial = DAG.getNode(CombineOpc, dl, LoOpVT, Lo, Hi, N->getFlags());
+  return DAG.getNode(N->getOpcode(), dl, ResVT, Partial, N->getFlags());
 }
 
 SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {


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