[llvm] r326963 - [X86][SSE] LowerBUILD_VECTORAsVariablePermute - reorder permute types. NFCI.

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 7 15:56:42 PST 2018


Author: rksimon
Date: Wed Mar  7 15:56:42 2018
New Revision: 326963

URL: http://llvm.org/viewvc/llvm-project?rev=326963&view=rev
Log:
[X86][SSE] LowerBUILD_VECTORAsVariablePermute - reorder permute types. NFCI.

Reorder into 128/256/512 bit vector size groupings.

NFCI commit before some new features.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=326963&r1=326962&r2=326963&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Mar  7 15:56:42 2018
@@ -7957,6 +7957,14 @@ LowerBUILD_VECTORAsVariablePermute(SDVal
         ShuffleVT = MVT::v2f64;
       }
       break;
+    case MVT::v32i8:
+      if (Subtarget.hasVLX() && Subtarget.hasVBMI())
+        Opcode = X86ISD::VPERMV;
+      break;
+    case MVT::v16i16:
+      if (Subtarget.hasVLX() && Subtarget.hasBWI())
+        Opcode = X86ISD::VPERMV;
+      break;
     case MVT::v8f32:
     case MVT::v8i32:
       if (Subtarget.hasAVX2())
@@ -7971,27 +7979,19 @@ LowerBUILD_VECTORAsVariablePermute(SDVal
         ShuffleVT = MVT::v8f32;
       }
       break;
-    case MVT::v16f32:
-    case MVT::v8f64:
-    case MVT::v16i32:
-    case MVT::v8i64:
-      if (Subtarget.hasAVX512())
+    case MVT::v64i8:
+      if (Subtarget.hasVBMI())
         Opcode = X86ISD::VPERMV;
       break;
     case MVT::v32i16:
       if (Subtarget.hasBWI())
         Opcode = X86ISD::VPERMV;
       break;
-    case MVT::v16i16:
-      if (Subtarget.hasVLX() && Subtarget.hasBWI())
-        Opcode = X86ISD::VPERMV;
-      break;
-    case MVT::v64i8:
-      if (Subtarget.hasVBMI())
-        Opcode = X86ISD::VPERMV;
-      break;
-    case MVT::v32i8:
-      if (Subtarget.hasVLX() && Subtarget.hasVBMI())
+    case MVT::v16f32:
+    case MVT::v16i32:
+    case MVT::v8f64:
+    case MVT::v8i64:
+      if (Subtarget.hasAVX512())
         Opcode = X86ISD::VPERMV;
       break;
     }




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