[PATCH] D44210: [AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space

[Farhana Aleen via Phabricator via llvm-commits]

FarhanaAleen created this revision.
FarhanaAleen added a reviewer: rampitec.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, kzhuravl, arsenm.

Starting from GCN 2nd generation, ISA supports ds_read_b128 on top of ds_read_b64. This patch supports ds_read_b128 instruction pattern and generation of this instruction.

In the vectorizer, this patch also widen the vector length so that vectorizer generates 128 bit loads for local address-space which gets translated to ds_read_b128.


https://reviews.llvm.org/D44210

Files:
  lib/Target/AMDGPU/AMDGPUInstructions.td
  lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
  lib/Target/AMDGPU/DSInstructions.td
  lib/Target/AMDGPU/SIISelLowering.cpp
  lib/Target/AMDGPU/SIInstrInfo.td
  test/CodeGen/AMDGPU/ds_read2_superreg.ll
  test/CodeGen/AMDGPU/indirect-private-64.ll
  test/CodeGen/AMDGPU/load-local-f32.ll
  test/CodeGen/AMDGPU/load-local-f64.ll
  test/CodeGen/AMDGPU/load-local-i16.ll
  test/CodeGen/AMDGPU/load-local-i32.ll
  test/CodeGen/AMDGPU/load-local-i64.ll
  test/CodeGen/AMDGPU/load-local-i8.ll
  test/CodeGen/AMDGPU/reorder-stores.ll

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