[PATCH] D43674: [TargetLowering] Add vector BITCAST support to SimplifyDemandedVectorElts
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 6 10:49:45 PST 2018
RKSimon added inline comments.
================
Comment at: test/CodeGen/X86/vector-shuffle-256-v16.ll:4606-4609
; AVX1-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
+; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,2,3,4,5,6,7]
+; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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spatel wrote:
> I haven't looked at this in a while, so not sure what's happening here, but this should just be:
> vbroadcastss (%rdi), %ymm0 ?
Its only broadcasting the lower i16 of the i32, so no unfortunately - in fact I think the test was added to make sure we don't do this.
Repository:
rL LLVM
https://reviews.llvm.org/D43674
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