[llvm] r326596 - [X86] Reject xmm16-31 in inline asm constraints when AVX512 is disabled

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 2 10:19:40 PST 2018


Author: ctopper
Date: Fri Mar  2 10:19:40 2018
New Revision: 326596

URL: http://llvm.org/viewvc/llvm-project?rev=326596&view=rev
Log:
[X86] Reject xmm16-31 in inline asm constraints when AVX512 is disabled

Fixes PR36532

Differential Revision: https://reviews.llvm.org/D43960

Added:
    llvm/trunk/test/CodeGen/X86/asm-reject-xmm16.ll
Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=326596&r1=326595&r2=326596&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Mar  2 10:19:40 2018
@@ -39160,6 +39160,15 @@ X86TargetLowering::getRegForInlineAsmCon
     return Res;
   }
 
+  // Make sure it isn't a register that requires AVX512.
+  if (!Subtarget.hasAVX512() && isFRClass(*Res.second) &&
+      TRI->getEncodingValue(Res.first) & 0x10) {
+    // Register requires EVEX prefix.
+    Res.first = 0;
+    Res.second = nullptr;
+    return Res;
+  }
+
   // Otherwise, check to see if this is a register class of the wrong value
   // type.  For example, we want to map "{ax},i32" -> {eax}, we don't want it to
   // turn into {ax},{dx}.

Added: llvm/trunk/test/CodeGen/X86/asm-reject-xmm16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/asm-reject-xmm16.ll?rev=326596&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/asm-reject-xmm16.ll (added)
+++ llvm/trunk/test/CodeGen/X86/asm-reject-xmm16.ll Fri Mar  2 10:19:40 2018
@@ -0,0 +1,8 @@
+; RUN: not llc -o /dev/null %s 2>&1 | FileCheck %s
+target triple = "x86_64--"
+
+; CHECK: error: couldn't allocate output register for constraint '{xmm16}'
+define i64 @blup() {
+  %v = tail call i64 asm "", "={xmm16},0"(i64 0)
+  ret i64 %v
+}




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