[PATCH] D43960: [X86] Reject xmm16-31 in inline asm constraints when AVX512 is disabled

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: RKSimon, spatel, zvi.

Fixes PR36532

I'm pretty sure we don't reject xmm8-xmm31 or r8-r15 in 32-bit mode either, but I'm starting with the filed bug.


https://reviews.llvm.org/D43960

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/asm-reject-xmm16.ll


Index: test/CodeGen/X86/asm-reject-xmm16.ll
===================================================================
--- /dev/null
+++ test/CodeGen/X86/asm-reject-xmm16.ll
@@ -0,0 +1,8 @@
+; RUN: not llc -o /dev/null %s 2>&1 | FileCheck %s
+target triple = "x86_64--"
+
+; CHECK: error: couldn't allocate output register for constraint '{xmm16}'
+define i64 @blup() {
+  %v = tail call i64 asm "", "={xmm16},0"(i64 0)
+  ret i64 %v
+}
Index: lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- lib/Target/X86/X86ISelLowering.cpp
+++ lib/Target/X86/X86ISelLowering.cpp
@@ -39155,6 +39155,15 @@
     return Res;
   }
 
+  // Make sure it isn't a register that requires AVX512.
+  if (!Subtarget.hasAVX512() && isFRClass(*Res.second) &&
+      TRI->getEncodingValue(Res.first) & 0x10) {
+    // Register requires EVEX prefix.
+    Res.first = 0;
+    Res.second = nullptr;
+    return Res;
+  }
+
   // Otherwise, check to see if this is a register class of the wrong value
   // type.  For example, we want to map "{ax},i32" -> {eax}, we don't want it to
   // turn into {ax},{dx}.


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