[llvm] r326364 - [Hexagon] Implement target feature +reserved-r19

Krzysztof Parzyszek via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 28 12:29:36 PST 2018


Author: kparzysz
Date: Wed Feb 28 12:29:36 2018
New Revision: 326364

URL: http://llvm.org/viewvc/llvm-project?rev=326364&view=rev
Log:
[Hexagon] Implement target feature +reserved-r19

Modified:
    llvm/trunk/lib/Target/Hexagon/Hexagon.td
    llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.cpp
    llvm/trunk/lib/Target/Hexagon/HexagonSubtarget.h

Modified: llvm/trunk/lib/Target/Hexagon/Hexagon.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/Hexagon.td?rev=326364&r1=326363&r2=326364&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/Hexagon.td (original)
+++ llvm/trunk/lib/Target/Hexagon/Hexagon.td Wed Feb 28 12:29:36 2018
@@ -55,6 +55,8 @@ def FeatureMemNoShuf: SubtargetFeature<"
       "Supports mem_noshuf feature">;
 def FeatureDuplex : SubtargetFeature<"duplex", "EnableDuplex", "true",
       "Enable generation of duplex instruction">;
+def FeatureReservedR19: SubtargetFeature<"reserved-r19", "ReservedR19",
+      "true", "Reserve register R19">;
 
 //===----------------------------------------------------------------------===//
 // Hexagon Instruction Predicate Definitions.

Modified: llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.cpp?rev=326364&r1=326363&r2=326364&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonRegisterInfo.cpp Wed Feb 28 12:29:36 2018
@@ -171,6 +171,9 @@ BitVector HexagonRegisterInfo::getReserv
   Reserved.set(Hexagon::C8);
   Reserved.set(Hexagon::USR_OVF);
 
+  if (MF.getSubtarget<HexagonSubtarget>().hasReservedR19())
+    Reserved.set(Hexagon::R19);
+
   for (int x = Reserved.find_first(); x >= 0; x = Reserved.find_next(x))
     markSuperRegs(Reserved, x);
 

Modified: llvm/trunk/lib/Target/Hexagon/HexagonSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonSubtarget.h?rev=326364&r1=326363&r2=326364&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonSubtarget.h (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonSubtarget.h Wed Feb 28 12:29:36 2018
@@ -52,6 +52,8 @@ class HexagonSubtarget : public HexagonG
 
   bool HasMemNoShuf = false;
   bool EnableDuplex = false;
+  bool ReservedR19 = false;
+
 public:
   Hexagon::ArchEnum HexagonArchVersion;
   Hexagon::ArchEnum HexagonHVXVersion = Hexagon::ArchEnum::V4;
@@ -152,6 +154,7 @@ public:
   bool useHVX128BOps() const { return useHVXOps() && UseHVX128BOps; }
   bool useHVX64BOps() const { return useHVXOps() && UseHVX64BOps; }
   bool hasMemNoShuf() const { return HasMemNoShuf; }
+  bool hasReservedR19() const { return ReservedR19; }
   bool useLongCalls() const { return UseLongCalls; }
   bool usePredicatedCalls() const;
 




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