[llvm] r326226 - ARM: Don't rewrite add reg, $sp, 0 -> mov reg, $sp if the add defines CPSR.
Peter Collingbourne via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 27 11:01:00 PST 2018
Author: pcc
Date: Tue Feb 27 11:00:59 2018
New Revision: 326226
URL: http://llvm.org/viewvc/llvm-project?rev=326226&view=rev
Log:
ARM: Don't rewrite add reg, $sp, 0 -> mov reg, $sp if the add defines CPSR.
Differential Revision: https://reviews.llvm.org/D43807
Added:
llvm/trunk/test/CodeGen/Thumb2/cmp-frame.ll
Modified:
llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp
Modified: llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp?rev=326226&r1=326225&r2=326226&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp Tue Feb 27 11:00:59 2018
@@ -489,7 +489,8 @@ bool llvm::rewriteT2FrameIndex(MachineIn
Offset += MI.getOperand(FrameRegIdx+1).getImm();
unsigned PredReg;
- if (Offset == 0 && getInstrPredicate(MI, PredReg) == ARMCC::AL) {
+ if (Offset == 0 && getInstrPredicate(MI, PredReg) == ARMCC::AL &&
+ !MI.definesRegister(ARM::CPSR)) {
// Turn it into a move.
MI.setDesc(TII.get(ARM::tMOVr));
MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
Added: llvm/trunk/test/CodeGen/Thumb2/cmp-frame.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/cmp-frame.ll?rev=326226&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/cmp-frame.ll (added)
+++ llvm/trunk/test/CodeGen/Thumb2/cmp-frame.ll Tue Feb 27 11:00:59 2018
@@ -0,0 +1,11 @@
+; RUN: llc < %s | FileCheck %s
+
+target triple = "thumbv7-linux-androideabi"
+
+define i1 @f() {
+ %a = alloca i8*
+ ; CHECK: adds.w r0, sp, #0
+ ; CHECK: it ne
+ %cmp = icmp ne i8** %a, null
+ ret i1 %cmp
+}
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