[llvm] r326147 - [AArch64] Harden test cases

Evandro Menezes via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 26 15:19:25 PST 2018


Author: evandro
Date: Mon Feb 26 15:19:25 2018
New Revision: 326147

URL: http://llvm.org/viewvc/llvm-project?rev=326147&view=rev
Log:
[AArch64] Harden test cases

NFC

Modified:
    llvm/trunk/test/CodeGen/AArch64/neon-extract.ll
    llvm/trunk/test/CodeGen/AArch64/strqro.ll

Modified: llvm/trunk/test/CodeGen/AArch64/neon-extract.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/neon-extract.ll?rev=326147&r1=326146&r2=326147&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/neon-extract.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/neon-extract.ll Mon Feb 26 15:19:25 2018
@@ -26,6 +26,7 @@ entry:
 
 define <1 x i64> @test_vext_s64(<1 x i64> %a, <1 x i64> %b) {
 ; CHECK-LABEL: test_vext_s64:
+; CHECK-NOT: ext {{v[0-9]+}}
 entry:
   %vext = shufflevector <1 x i64> %a, <1 x i64> %b, <1 x i32> <i32 0>
   ret <1 x i64> %vext
@@ -136,6 +137,7 @@ entry:
 
 define <1 x double> @test_vext_f64(<1 x double> %a, <1 x double> %b) {
 ; CHECK-LABEL: test_vext_f64:
+; CHECK-NOT: ext {{v[0-9]+}}
 entry:
   %vext = shufflevector <1 x double> %a, <1 x double> %b, <1 x i32> <i32 0>
   ret <1 x double> %vext

Modified: llvm/trunk/test/CodeGen/AArch64/strqro.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/strqro.ll?rev=326147&r1=326146&r2=326147&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/strqro.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/strqro.ll Mon Feb 26 15:19:25 2018
@@ -1,5 +1,6 @@
-; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck --check-prefix=CHECK --check-prefix=CHECK-STRQRO %s
-; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mcpu=falkor | FileCheck --check-prefix=CHECK --check-prefix=CHECK-NOSTRQRO %s
+; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu                          | FileCheck %s --check-prefixes=CHECK,CHECK-STRQRO
+; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=slow-strqro-store | FileCheck %s --check-prefixes=CHECK,CHECK-NOSTRQRO
+; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mcpu=falkor             | FileCheck %s --check-prefixes=CHECK,CHECK-NOSTRQRO
 
 ; CHECK-LABEL: strqrox:
 ; CHECK-STRQRO: str q{{[0-9]+}}, [x{{[0-9]+}}, x




More information about the llvm-commits mailing list