[PATCH] D43733: [X86][SSE] Reduce FADD/FSUB/FMUL costs on later targets (PR36280)
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Feb 24 10:03:55 PST 2018
RKSimon created this revision.
RKSimon added reviewers: ABataev, craig.topper, spatel.
Agner's tables indicate that for SSE42+ targets (Core2 and later) we can reduce the FADD/FSUB/FMUL costs down to 1, which should fix the Himeno benchmark.
Note: the AVX512 FDIV costs look rather dodgy, but this isn't part of this patch.
Repository:
rL LLVM
https://reviews.llvm.org/D43733
Files:
lib/Target/X86/X86TargetTransformInfo.cpp
test/Analysis/CostModel/X86/arith-fp.ll
test/Analysis/CostModel/X86/intrinsic-cost.ll
test/Transforms/SLPVectorizer/X86/PR36280.ll
test/Transforms/SLPVectorizer/X86/cse.ll
test/Transforms/SLPVectorizer/X86/horizontal.ll
test/Transforms/SLPVectorizer/X86/reorder_phi.ll
test/Transforms/SLPVectorizer/X86/simplebb.ll
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