[llvm] r325739 - [PowerPC] Do not produce invalid CTR loop with an FRem

[Hans Wennborg via llvm-commits]

Merged to 6.0 in r325767.

On Thu, Feb 22, 2018 at 4:02 AM, Nemanja Ivanovic via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
> Author: nemanjai
> Date: Wed Feb 21 19:02:41 2018
> New Revision: 325739
>
> URL: http://llvm.org/viewvc/llvm-project?rev=325739&view=rev
> Log:
> [PowerPC] Do not produce invalid CTR loop with an FRem
>
> An FRem instruction inside a loop should prevent the loop from being converted
> into a CTR loop since this is not an operation that is legal on any PPC
> subtarget. This will always be a call to a library function which means the
> loop will be invalid if this instruction is in the body.
>
> Fixes PR36292.
>
> Added:
>     llvm/trunk/test/CodeGen/PowerPC/pr36292.ll
> Modified:
>     llvm/trunk/lib/Target/PowerPC/PPCCTRLoops.cpp
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCCTRLoops.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCCTRLoops.cpp?rev=325739&r1=325738&r2=325739&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCCTRLoops.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCCTRLoops.cpp Wed Feb 21 19:02:41 2018
> @@ -455,13 +455,16 @@ bool PPCCTRLoops::mightUseCTR(BasicBlock
>          return true;
>      }
>
> +    // FREM is always a call.
> +    if (J->getOpcode() == Instruction::FRem)
> +      return true;
> +
>      if (STI->useSoftFloat()) {
>        switch(J->getOpcode()) {
>        case Instruction::FAdd:
>        case Instruction::FSub:
>        case Instruction::FMul:
>        case Instruction::FDiv:
> -      case Instruction::FRem:
>        case Instruction::FPTrunc:
>        case Instruction::FPExt:
>        case Instruction::FPToUI:
>
> Added: llvm/trunk/test/CodeGen/PowerPC/pr36292.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/pr36292.ll?rev=325739&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/PowerPC/pr36292.ll (added)
> +++ llvm/trunk/test/CodeGen/PowerPC/pr36292.ll Wed Feb 21 19:02:41 2018
> @@ -0,0 +1,46 @@
> +; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown < %s  | \
> +; RUN:   FileCheck %s --implicit-check-not=mtctr --implicit-check-not=bdnz
> +$test = comdat any
> +
> +; No CTR loop due to frem (since it is always a call).
> +define void @test() #0 comdat {
> +; CHECK-LABEL: test:
> +; CHECK:    ld 29, 0(3)
> +; CHECK:    ld 30, 40(1)
> +; CHECK:    xxlxor 31, 31, 31
> +; CHECK:    cmpld 30, 29
> +; CHECK-NEXT:    bge- 0, .LBB0_2
> +; CHECK-NEXT:    .p2align 5
> +; CHECK-NEXT:  .LBB0_1: # %bounds.ok
> +; CHECK:    fmr 1, 31
> +; CHECK-NEXT:    lfsx 2, 0, 3
> +; CHECK-NEXT:    bl fmodf
> +; CHECK-NEXT:    nop
> +; CHECK-NEXT:    addi 30, 30, 1
> +; CHECK-NEXT:    stfsx 1, 0, 3
> +; CHECK-NEXT:    cmpld 30, 29
> +; CHECK-NEXT:    blt+ 0, .LBB0_1
> +; CHECK-NEXT:  .LBB0_2: # %bounds.fail
> +; CHECK-NEXT:    std 30, 40(1)
> +  %pos = alloca i64, align 8
> +  br label %forcond
> +
> +forcond:                                          ; preds = %bounds.ok, %0
> +  %1 = load i64, i64* %pos
> +  %.len1 = load i64, i64* undef
> +  %bounds.cmp = icmp ult i64 %1, %.len1
> +  br i1 %bounds.cmp, label %bounds.ok, label %bounds.fail
> +
> +bounds.ok:                                        ; preds = %forcond
> +  %2 = load float, float* undef
> +  %3 = frem float 0.000000e+00, %2
> +  store float %3, float* undef
> +  %4 = load i64, i64* %pos
> +  %5 = add i64 %4, 1
> +  store i64 %5, i64* %pos
> +  br label %forcond
> +
> +bounds.fail:                                      ; preds = %forcond
> +  unreachable
> +}
> +
>
>
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