[llvm] r325580 - [Hexagon] Fix alignment calculation of stack objects in Hexagon bit tracker

[Krzysztof Parzyszek via llvm-commits]

Author: kparzysz
Date: Tue Feb 20 06:29:43 2018
New Revision: 325580

URL: http://llvm.org/viewvc/llvm-project?rev=325580&view=rev
Log:
[Hexagon] Fix alignment calculation of stack objects in Hexagon bit tracker

Added:
    llvm/trunk/test/CodeGen/Hexagon/bit-addr-align.mir
Modified:
    llvm/trunk/lib/Target/Hexagon/HexagonBitSimplify.cpp
    llvm/trunk/lib/Target/Hexagon/HexagonBitTracker.cpp
    llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp

Modified: llvm/trunk/lib/Target/Hexagon/HexagonBitSimplify.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonBitSimplify.cpp?rev=325580&r1=325579&r2=325580&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonBitSimplify.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonBitSimplify.cpp Tue Feb 20 06:29:43 2018
@@ -184,9 +184,7 @@ namespace {
   public:
     static char ID;
 
-    HexagonBitSimplify() : MachineFunctionPass(ID) {
-      initializeHexagonBitSimplifyPass(*PassRegistry::getPassRegistry());
-    }
+    HexagonBitSimplify() : MachineFunctionPass(ID) {}
 
     StringRef getPassName() const override {
       return "Hexagon bit simplification";
@@ -257,10 +255,10 @@ namespace {
 
 char HexagonBitSimplify::ID = 0;
 
-INITIALIZE_PASS_BEGIN(HexagonBitSimplify, "hexbit",
+INITIALIZE_PASS_BEGIN(HexagonBitSimplify, "hexagon-bit-simplify",
       "Hexagon bit simplification", false, false)
 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
-INITIALIZE_PASS_END(HexagonBitSimplify, "hexbit",
+INITIALIZE_PASS_END(HexagonBitSimplify, "hexagon-bit-simplify",
       "Hexagon bit simplification", false, false)
 
 bool HexagonBitSimplify::visitBlock(MachineBasicBlock &B, Transformation &T,

Modified: llvm/trunk/lib/Target/Hexagon/HexagonBitTracker.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonBitTracker.cpp?rev=325580&r1=325579&r2=325580&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonBitTracker.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonBitTracker.cpp Tue Feb 20 06:29:43 2018
@@ -325,7 +325,7 @@ bool HexagonEvaluator::evaluate(const Ma
       int FI = op(1).getIndex();
       int Off = op(2).getImm();
       unsigned A = MFI.getObjectAlignment(FI) + std::abs(Off);
-      unsigned L = Log2_32(A);
+      unsigned L = countTrailingZeros(A);
       RegisterCell RC = RegisterCell::self(Reg[0].Reg, W0);
       RC.fill(0, L, BT::BitValue::Zero);
       return rr0(RC, Outputs);

Modified: llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp?rev=325580&r1=325579&r2=325580&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp Tue Feb 20 06:29:43 2018
@@ -121,6 +121,7 @@ SchedCustomRegistry("hexagon", "Run Hexa
 
 namespace llvm {
   extern char &HexagonExpandCondsetsID;
+  void initializeHexagonBitSimplifyPass(PassRegistry&);
   void initializeHexagonConstExtendersPass(PassRegistry&);
   void initializeHexagonEarlyIfConversionPass(PassRegistry&);
   void initializeHexagonExpandCondsetsPass(PassRegistry&);
@@ -185,6 +186,7 @@ extern "C" void LLVMInitializeHexagonTar
   RegisterTargetMachine<HexagonTargetMachine> X(getTheHexagonTarget());
 
   PassRegistry &PR = *PassRegistry::getPassRegistry();
+  initializeHexagonBitSimplifyPass(PR);
   initializeHexagonConstExtendersPass(PR);
   initializeHexagonEarlyIfConversionPass(PR);
   initializeHexagonGenMuxPass(PR);

Added: llvm/trunk/test/CodeGen/Hexagon/bit-addr-align.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/bit-addr-align.mir?rev=325580&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/bit-addr-align.mir (added)
+++ llvm/trunk/test/CodeGen/Hexagon/bit-addr-align.mir Tue Feb 20 06:29:43 2018
@@ -0,0 +1,18 @@
+# RUN: llc -march=hexagon -run-pass hexagon-bit-simplify %s -o - | FileCheck %s
+
+# Hexagon bit tracker incorrectly calculated address alignment and removed
+# a necessary A2_andir instruction. Make sure it remains.
+# CHECK: A2_andir %0, -8
+
+---
+name: fred
+stack:
+  - { id: 0, type: default, size: 64, alignment: 64 }
+tracksRegLiveness: true
+body: |
+  bb.0:
+    %0:intregs = PS_fi %stack.0, 60
+    %1:intregs = A2_andir %0, -8
+    %2:doubleregs = L2_loadrd_io %1, 8
+...
+