[PATCH] D43460: [X86] Fix scheduling info for IMUL on haswell onwards.

[Clement Courbet via Phabricator via llvm-commits]

courbet created this revision.
courbet added reviewers: craig.topper, RKSimon, gadi.haber.
Herald added a subscriber: llvm-commits.

Only IMUL16rri uses an extra P0156. IMUL32* and IMUL16rr only use
https://reviews.llvm.org/P1.
This was computed using https://github.com/google/EXEgesis/blob/master/exegesis/tools/compute_itineraries.cc

This can easily be validated by running perf on the following code:

  int main(int argc, char**argv) {
    int a = argc;
    int b = argc;
    int c = argc;
    int d = argc;
  
    for (int i = 0; i < LOOP_ITERATIONS; ++i) {
      asm volatile(
        R"(
          .rept 10000
          imull $0x2, %%edx, %%eax
          imull $0x2, %%ecx, %%ebx
          imull $0x2, %%eax, %%edx
          imull $0x2, %%ebx, %%ecx
          .endr
        )"
        : "+a"(a), "+b"(b), "+c"(c), "+d"(d)
        :
        :);
    }
    return a+b+c+d;
  }

-> test.cc

perf stat -x, -e cycles --pfm-events=uops_executed_port:port_0:u,uops_executed_port:port_1:u,uops_executed_port:port_2:u,uops_executed_port:port_3:u,uops_executed_port:port_4:u,uops_executed_port:port_5:u,uops_executed_port:port_6:u,uops_executed_port:port_7:u test


Repository:
  rL LLVM

https://reviews.llvm.org/D43460

Files:
  lib/Target/X86/X86SchedBroadwell.td
  lib/Target/X86/X86SchedHaswell.td
  lib/Target/X86/X86SchedSkylakeClient.td
  lib/Target/X86/X86SchedSkylakeServer.td

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