[PATCH] D43367: [X86] Turn selects with constant condition into vector shuffles during DAG combine

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 134715.
craig.topper added a comment.

Treat undef as selecting the RHS. This removed the change from vselect.ll

Some of the other changes look to be using an inverted mask with swapped operands.


https://reviews.llvm.org/D43367

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/fold-vector-sext-crash.ll
  test/CodeGen/X86/pr34592.ll
  test/CodeGen/X86/vector-blend.ll

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