[PATCH] D43349: [InstCombine] Make SimplifyDemandedUseBits handle PhiNode

Rong Xu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 16 10:51:57 PST 2018


xur marked an inline comment as done.
xur added inline comments.


================
Comment at: lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp:473
 
+      if (SimplifyDemandedBits(I, 0, DemandedMaskIn, Known, Depth + 1))
+        return I;
----------------
craig.topper wrote:
> This seems unrelated or at least unexplained.
see the comments below.


================
Comment at: lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp:479
       if (cast<LShrOperator>(I)->isExact())
         DemandedMaskIn.setLowBits(ShiftAmt);
 
----------------
craig.topper wrote:
> DemandedMaskIn isn't used after this.
I actually did not understand why DemandedMaskIn is reset here. So I moved it down (after processed the operand 0).

To me, since we  are doing the do the shift right, ShiftAmt of the lowbits is not needed (whatever value it might be).
The original code seems to say these lowbits are needed. 

If the lowbits in DemandMaskin are indeed needed, I would have to set the Known.zero and check Known.zero in AND instruction.



https://reviews.llvm.org/D43349





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