[PATCH] D43310: [AArch64][GlobalISel] Fix an assert fail/miscompile when fp16 types are copied to GPR register banks

Quentin Colombet via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 16 09:26:20 PST 2018


qcolombet accepted this revision.
qcolombet added a comment.
This revision is now accepted and ready to land.

Hi Amara,

Couple of nitpicks on the test case, but LGTM otherwise.
I believe we would need the same kind of fix for copies in the other direction.

Cheers,
-Quentin



================
Comment at: lib/Target/AArch64/AArch64InstructionSelector.cpp:857
+      return constrainSelectedInstRegOperands(I, TII, TRI, RBI);
+    }
+
----------------
I believe the part regarding insert should be its own separate patch.


================
Comment at: test/CodeGen/AArch64/GlobalISel/pr36345-fp16-copy-gpr.mir:2
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=aarch64-unknown-unknown -o - -global-isel -verify-machineinstrs -run-pass=instruction-select %s | FileCheck %s
+--- |
----------------
Put the PR number in the comment, but not in the filename please.


================
Comment at: test/CodeGen/AArch64/GlobalISel/pr36345-fp16-copy-gpr.mir:69
+      di-variable: '', di-expression: '', di-location: '' }
+constants:
+body:             |
----------------
You can use -simplify-mir when you generate your .mir test case to get rid of all the cruft.
In particular, I don't think we need the preferred-registers part, the frameInfo, the stack and the IR could probably be shrunk.


Repository:
  rL LLVM

https://reviews.llvm.org/D43310





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