[PATCH] D43201: [X86] Only reorder srl/and on last DAG combiner run

[David Zarzycki via Phabricator via llvm-commits]

davezarzycki added a comment.

I don't have any benchmarks. Anecdotally speaking from my experience at Apple: improving code density tends to improve overall system performance. That being said, microbenchmarks sometime suffer.

(Beyond the scope of this patch…) I wish LLVM or the x86 backend could change its instruction selection on the fly. Then it could prefer "reasonable density" (not microcoded) by default and "throughput" in loops (or otherwise obvious hot paths). This would probably yield the best overall/pragmatic performance.


https://reviews.llvm.org/D43201