[PATCH] D34515: [ARM] Materialise some boolean values to avoid a branch

[Sam Parker via Phabricator via llvm-commits]

samparker accepted this revision.
samparker added a comment.
This revision is now accepted and ready to land.

No other points from me, lets get this monster in. (fingers crossed)



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Comment at: test/CodeGen/ARM/select-imm.ll:239
+; THUMB1: bl f
+; THUMB1: sxtb r1, r4
+; THUMB1: uxtb r0, r1
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rogfer01 wrote:
> samparker wrote:
> > Why do we have a sxtb for T1 and not T2?
> This comes from the load byte + sext in that testcase.
> 
> In Thumb2 we can coalesce the load byte + sext in a single `ldrsb.w Rt, [Rn, #0]` while in Thumb1 we can't do that (at least directly) because there `ldsrb` is of the form `ldsrb Rt, [Rn, Rm]` so a `ldrb Rt, [Rn, #0]` and then a `sxtb Rt, Rn` are used instead.
Ok cheers, I didn't realise we didn't have ldrsb in thumb-1. But still odd this doesn't get combined away, guess it must be because the load has two users.


https://reviews.llvm.org/D34515