[PATCH] D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint
Pablo Barrio via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 15 01:54:48 PST 2018
pbarrio added a comment.
> What about 32-bit integers?
Sorry, I don't understand. 32-bit integers are tested in a previous test (t-constraint-int) above the code added by the current patch, and 32-bit-integer vectors are tested in the tests I added in the last iteration (t-constraint-int-vector-128bit and t-constraint-int-vector-64bit). Is there any test I'm missing here?
> When users do something wrong, we try our best to let them know. :)
>
> If we don't have an error message for that, we should.
The compiler throws an error message already:
>> <inline asm>:1:6: error: invalid operand for instruction
>>
>> vadd.f64 q0, q0, q1
Thanks! :)
Repository:
rL LLVM
https://reviews.llvm.org/D42962
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