[llvm] r325138 - [x86] add baseline vector compare tests for D42948; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 14 08:15:15 PST 2018
Author: spatel
Date: Wed Feb 14 08:15:15 2018
New Revision: 325138
URL: http://llvm.org/viewvc/llvm-project?rev=325138&view=rev
Log:
[x86] add baseline vector compare tests for D42948; NFC
Added:
llvm/trunk/test/CodeGen/X86/vector-compare-simplify.ll
Added: llvm/trunk/test/CodeGen/X86/vector-compare-simplify.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-compare-simplify.ll?rev=325138&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-compare-simplify.ll (added)
+++ llvm/trunk/test/CodeGen/X86/vector-compare-simplify.ll Wed Feb 14 08:15:15 2018
@@ -0,0 +1,353 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
+
+; Test simplifications of vector compares that should simplify to true, false or equality.
+
+define <4 x i32> @slt_min(<4 x i32> %x) {
+; CHECK-LABEL: slt_min:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483648,2147483648,2147483648,2147483648]
+; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
+; CHECK-NEXT: movdqa %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp slt <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @sge_min(<4 x i32> %x) {
+; CHECK-LABEL: sge_min:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483648,2147483648,2147483648,2147483648]
+; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
+; CHECK-NEXT: pcmpeqd %xmm0, %xmm0
+; CHECK-NEXT: pxor %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp sge <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @sgt_min(<4 x i32> %x) {
+; CHECK-LABEL: sgt_min:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp sgt <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @sle_min(<4 x i32> %x) {
+; CHECK-LABEL: sle_min:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
+; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
+; CHECK-NEXT: pxor %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp sle <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @sgt_max(<4 x i32> %x) {
+; CHECK-LABEL: sgt_max:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp sgt <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @sle_max(<4 x i32> %x) {
+; CHECK-LABEL: sle_max:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
+; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
+; CHECK-NEXT: pxor %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp sle <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @slt_max(<4 x i32> %x) {
+; CHECK-LABEL: slt_max:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483647,2147483647,2147483647,2147483647]
+; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
+; CHECK-NEXT: movdqa %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp slt <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @sge_max(<4 x i32> %x) {
+; CHECK-LABEL: sge_max:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483647,2147483647,2147483647,2147483647]
+; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
+; CHECK-NEXT: movdqa %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp slt <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @ult_min(<4 x i32> %x) {
+; CHECK-LABEL: ult_min:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483648,2147483648,2147483648,2147483648]
+; CHECK-NEXT: pxor %xmm1, %xmm0
+; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
+; CHECK-NEXT: movdqa %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp ult <4 x i32> %x, zeroinitializer
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @uge_min(<4 x i32> %x) {
+; CHECK-LABEL: uge_min:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483648,2147483648,2147483648,2147483648]
+; CHECK-NEXT: pxor %xmm1, %xmm0
+; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
+; CHECK-NEXT: pcmpeqd %xmm0, %xmm0
+; CHECK-NEXT: pxor %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp uge <4 x i32> %x, zeroinitializer
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @ugt_min(<4 x i32> %x) {
+; CHECK-LABEL: ugt_min:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483648,2147483648,2147483648,2147483648]
+; CHECK-NEXT: pxor %xmm1, %xmm0
+; CHECK-NEXT: pcmpgtd %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp ugt <4 x i32> %x, zeroinitializer
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @ule_min(<4 x i32> %x) {
+; CHECK-LABEL: ule_min:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483648,2147483648,2147483648,2147483648]
+; CHECK-NEXT: pxor %xmm1, %xmm0
+; CHECK-NEXT: pcmpgtd %xmm1, %xmm0
+; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
+; CHECK-NEXT: pxor %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp ule <4 x i32> %x, zeroinitializer
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @ugt_max(<4 x i32> %x) {
+; CHECK-LABEL: ugt_max:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pxor {{.*}}(%rip), %xmm0
+; CHECK-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp ugt <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @ule_max(<4 x i32> %x) {
+; CHECK-LABEL: ule_max:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
+; CHECK-NEXT: pxor {{.*}}(%rip), %xmm0
+; CHECK-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
+; CHECK-NEXT: pxor %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp ule <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @ult_max(<4 x i32> %x) {
+; CHECK-LABEL: ult_max:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pxor {{.*}}(%rip), %xmm0
+; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483647,2147483647,2147483647,2147483647]
+; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
+; CHECK-NEXT: movdqa %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp ult <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @uge_max(<4 x i32> %x) {
+; CHECK-LABEL: uge_max:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pcmpeqd %xmm2, %xmm2
+; CHECK-NEXT: pxor {{.*}}(%rip), %xmm0
+; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483647,2147483647,2147483647,2147483647]
+; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
+; CHECK-NEXT: pxor %xmm2, %xmm1
+; CHECK-NEXT: movdqa %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp uge <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @slt_min_plus1(<4 x i32> %x) {
+; CHECK-LABEL: slt_min_plus1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483649,2147483649,2147483649,2147483649]
+; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
+; CHECK-NEXT: movdqa %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp slt <4 x i32> %x, <i32 -2147483647, i32 -2147483647, i32 -2147483647, i32 -2147483647>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @sge_min_plus1(<4 x i32> %x) {
+; CHECK-LABEL: sge_min_plus1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483649,2147483649,2147483649,2147483649]
+; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
+; CHECK-NEXT: pcmpeqd %xmm0, %xmm0
+; CHECK-NEXT: pxor %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp sge <4 x i32> %x, <i32 -2147483647, i32 -2147483647, i32 -2147483647, i32 -2147483647>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @sgt_max_minus1(<4 x i32> %x) {
+; CHECK-LABEL: sgt_max_minus1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp sgt <4 x i32> %x, <i32 2147483646, i32 2147483646, i32 2147483646, i32 2147483646>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @sle_max_minus1(<4 x i32> %x) {
+; CHECK-LABEL: sle_max_minus1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
+; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
+; CHECK-NEXT: pxor %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp sle <4 x i32> %x, <i32 2147483646, i32 2147483646, i32 2147483646, i32 2147483646>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @ult_one(<4 x i32> %x) {
+; CHECK-LABEL: ult_one:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pxor {{.*}}(%rip), %xmm0
+; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483649,2147483649,2147483649,2147483649]
+; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
+; CHECK-NEXT: movdqa %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp ult <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @uge_one(<4 x i32> %x) {
+; CHECK-LABEL: uge_one:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pxor {{.*}}(%rip), %xmm0
+; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [2147483649,2147483649,2147483649,2147483649]
+; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
+; CHECK-NEXT: pcmpeqd %xmm0, %xmm0
+; CHECK-NEXT: pxor %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp uge <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @ugt_max_minus1(<4 x i32> %x) {
+; CHECK-LABEL: ugt_max_minus1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pxor {{.*}}(%rip), %xmm0
+; CHECK-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp ugt <4 x i32> %x, <i32 -2, i32 -2, i32 -2, i32 -2>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @ule_max_minus1(<4 x i32> %x) {
+; CHECK-LABEL: ule_max_minus1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pxor {{.*}}(%rip), %xmm0
+; CHECK-NEXT: pcmpgtd {{.*}}(%rip), %xmm0
+; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
+; CHECK-NEXT: pxor %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp ule <4 x i32> %x, <i32 -2, i32 -2, i32 -2, i32 -2>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @ugt_smax(<4 x i32> %x) {
+; CHECK-LABEL: ugt_smax:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pxor {{.*}}(%rip), %xmm0
+; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
+; CHECK-NEXT: pcmpgtd %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp ugt <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @ule_smax(<4 x i32> %x) {
+; CHECK-LABEL: ule_smax:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pxor {{.*}}(%rip), %xmm0
+; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
+; CHECK-NEXT: pcmpgtd %xmm1, %xmm0
+; CHECK-NEXT: pxor %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp ule <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @ult_smin(<4 x i32> %x) {
+; CHECK-LABEL: ult_smin:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pxor {{.*}}(%rip), %xmm0
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
+; CHECK-NEXT: movdqa %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp ult <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
+define <4 x i32> @uge_smin(<4 x i32> %x) {
+; CHECK-LABEL: uge_smin:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pxor {{.*}}(%rip), %xmm0
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: pcmpgtd %xmm0, %xmm1
+; CHECK-NEXT: pcmpeqd %xmm0, %xmm0
+; CHECK-NEXT: pxor %xmm1, %xmm0
+; CHECK-NEXT: retq
+ %cmp = icmp uge <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>
+ %r = sext <4 x i1> %cmp to <4 x i32>
+ ret <4 x i32> %r
+}
+
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