[PATCH] D43280: [ARM] f16 stack spill/reloads

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer added a comment.

This IR is generated from the reduced C test case:

  fn1() {
    fn2(9.765625e4F16);
    fn3(9.765625e4F16);
  }

There is a bit of bitcasting going on because of the way we pass half-floats,
and a few alloca's because the easiest way to trigger this is with fast-isel
and no reg allocation, so I am not sure how I can further reduce this.


https://reviews.llvm.org/D43280