[PATCH] D43087: [SelectionDAG][X86] Fix incorrect offset generated for VMASKMOV
Elena Demikhovsky via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 14 04:53:47 PST 2018
delena added a reviewer: RKSimon.
delena added inline comments.
================
Comment at: lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp:1214
- MMO = DAG.getMachineFunction().
- getMachineMemOperand(MLD->getPointerInfo(),
- MachineMemOperand::MOLoad, HiMemVT.getStoreSize(),
- SecondHalfAlignment, MLD->getAAInfo(), MLD->getRanges());
+ assert(Ptr.getNumOperands() == 2 &&
+ "Expected two operands in Ptr after increment");
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Why the Ptr should have only 2 operands? Can TLI increment memory address using GEP? Can it be done using ADD?
I don't think that you can assume anything about the TLI operation.
================
Comment at: lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp:1218
+ unsigned Off = OffSDNode ? OffSDNode->getAPIntValue().getZExtValue() : 0;
+
+ MMO = DAG.getMachineFunction().getMachineMemOperand(
----------------
The offset should always be the size of the Lo, right? Why 0? Why 32?
https://reviews.llvm.org/D43087
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