[PATCH] D43283: Variable register class using HwMode

[Aleksandar Beserminji via Phabricator via llvm-commits]

abeserminji created this revision.
abeserminji added reviewers: petarj, sdardis, kparzysz.

This patch introduces RegClassByHwMode which allows choosing the certain register class in run-time, depending on activated features.

For example:

  def HwModeA  : HwMode<"+fp64", "RegClass">;
  def VarRegClass : RegisterClassByHwMode<[DefaultMode, HwModeA], [DefaultRegClass, FP64RegClass]>,  RegisterClass<"Target", [f64], 64, (add D0)>;

When +fp64 feature is present, HwModeA is active and VarRegClass behaves like FP64RegClass. Otherwise it becomes DefaultRegClass.

Concern that I have here is that VarRegClass has to inherit RegisterClass in order to use it for instruction definitions. RegisterClass as defined in this case is not used later, because it's substituted with DefaultRegClass/FP64RegClass in tables like MCRegisterClasses[], RegisterClasses[] etc. I'd be glad to hear some comments on that/suggestions on how to fix it.

Depends on https://reviews.llvm.org/D43238. This is second in a series of three patches.


Repository:
  rL LLVM

https://reviews.llvm.org/D43283

Files:
  include/llvm/CodeGen/TargetRegisterInfo.h
  include/llvm/MC/MCRegisterInfo.h
  include/llvm/Target/Target.td
  utils/TableGen/InfoByHwMode.cpp
  utils/TableGen/InfoByHwMode.h
  utils/TableGen/RegisterInfoEmitter.cpp

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