[PATCH] D43225: [DAGCombiner] Add one use check to fold (not (and x, y)) -> (or (not x), (not y))

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: spatel, RKSimon.

If the and has an additional use we shouldn't invert it. That creates an additional instruction.

While there add a one use check to the transform above that looked similar.


Repository:
  rL LLVM

https://reviews.llvm.org/D43225

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/X86/tbm_patterns.ll


Index: test/CodeGen/X86/tbm_patterns.ll
===================================================================
--- test/CodeGen/X86/tbm_patterns.ll
+++ test/CodeGen/X86/tbm_patterns.ll
@@ -907,17 +907,12 @@
   ret i64 %and
 }
 
-; This should select blcic
-; TODO: the xor is being combined with the mask and creating an or that's breaking this. Looks like a missing one use check.
+; Make sure the mask doesn't break our matching of blcic
 define  i64 @masked_blcic(i64) {
 ; CHECK-LABEL: masked_blcic:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    movzwl %di, %eax
-; CHECK-NEXT:    # kill: def $edi killed $edi killed $rdi def $rdi
-; CHECK-NEXT:    notl %edi
-; CHECK-NEXT:    orq $-65536, %rdi # imm = 0xFFFF0000
-; CHECK-NEXT:    incq %rax
-; CHECK-NEXT:    andq %rdi, %rax
+; CHECK-NEXT:    blcicq %rax, %rax
 ; CHECK-NEXT:    retq
   %2 = and i64 %0, 65535
   %3 = xor i64 %2, -1
Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -5398,7 +5398,7 @@
   }
 
   // fold (not (or x, y)) -> (and (not x), (not y)) iff x or y are setcc
-  if (isOneConstant(N1) && VT == MVT::i1 &&
+  if (isOneConstant(N1) && VT == MVT::i1 && N0.hasOneUse() &&
       (N0.getOpcode() == ISD::OR || N0.getOpcode() == ISD::AND)) {
     SDValue LHS = N0.getOperand(0), RHS = N0.getOperand(1);
     if (isOneUseSetCC(RHS) || isOneUseSetCC(LHS)) {
@@ -5410,7 +5410,7 @@
     }
   }
   // fold (not (or x, y)) -> (and (not x), (not y)) iff x or y are constants
-  if (isAllOnesConstant(N1) &&
+  if (isAllOnesConstant(N1) && N0.hasOneUse() &&
       (N0.getOpcode() == ISD::OR || N0.getOpcode() == ISD::AND)) {
     SDValue LHS = N0.getOperand(0), RHS = N0.getOperand(1);
     if (isa<ConstantSDNode>(RHS) || isa<ConstantSDNode>(LHS)) {


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