[PATCH] D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint

[Renato Golin via Phabricator via llvm-commits]

rengolin added a comment.

In https://reviews.llvm.org/D42962#1005311, @pbarrio wrote:

> I was wrong when I said the GNU modifiers are q/e, which actually makes things easier. The correct operand modifiers to select a quad/double vector register in GCC are q/P. These already work in LLVM (they are just ignored according to the documentation and also my local testing). So, I think there is no need for an additional patch; we should be able to handle inline assembly written for GCC with the 't' constraint.


I'm not sure I get this. Are you saying this patch can be abandoned?


Repository:
  rL LLVM

https://reviews.llvm.org/D42962