[llvm] r324897 - [X86][MMX] Add missing scheduling class tag for EMMS/FEMMS

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Mon Feb 12 07:52:59 2018
New Revision: 324897

URL: http://llvm.org/viewvc/llvm-project?rev=324897&view=rev
Log:
[X86][MMX] Add missing scheduling class tag for EMMS/FEMMS

We only tagged it with the itinerary class, so completeness checks were erroneously passed (PR35639).

AMD targets can perform these a lot quicker than WriteMicrocoded so will need an override in the models.

Modified:
    llvm/trunk/lib/Target/X86/X86Instr3DNow.td
    llvm/trunk/lib/Target/X86/X86InstrMMX.td
    llvm/trunk/test/CodeGen/X86/3dnow-schedule.ll
    llvm/trunk/test/CodeGen/X86/mmx-schedule.ll

Modified: llvm/trunk/lib/Target/X86/X86Instr3DNow.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr3DNow.td?rev=324897&r1=324896&r2=324897&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Instr3DNow.td (original)
+++ llvm/trunk/lib/Target/X86/X86Instr3DNow.td Mon Feb 12 07:52:59 2018
@@ -113,6 +113,8 @@ defm PFSUBR   : I3DNow_binop_rm_int<0xAA
 defm PI2FD    : I3DNow_conv_rm_int<0x0D, "pi2fd", I3DNOW_FCVT_I2F_ITINS>;
 defm PMULHRW  : I3DNow_binop_rm_int<0xB7, "pmulhrw", I3DNOW_MISC_FUNC_ITINS, 1>;
 
+// FIXME: Is there a better scheduler class for EMMS/FEMMS?
+let SchedRW = [WriteMicrocoded] in
 def FEMMS : I3DNow<0x0E, RawFrm, (outs), (ins), "femms",
                    [(int_x86_mmx_femms)], IIC_MMX_EMMS>;
 

Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=324897&r1=324896&r2=324897&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Mon Feb 12 07:52:59 2018
@@ -221,6 +221,8 @@ multiclass sse12_cvt_pint_3addr<bits<8>
 // MMX EMMS Instruction
 //===----------------------------------------------------------------------===//
 
+// FIXME: Is there a better scheduler class for EMMS/FEMMS?
+let SchedRW = [WriteMicrocoded] in
 def MMX_EMMS  : MMXI<0x77, RawFrm, (outs), (ins), "emms",
                      [(int_x86_mmx_emms)], IIC_MMX_EMMS>;
 

Modified: llvm/trunk/test/CodeGen/X86/3dnow-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/3dnow-schedule.ll?rev=324897&r1=324896&r2=324897&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/3dnow-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/3dnow-schedule.ll Mon Feb 12 07:52:59 2018
@@ -4,7 +4,7 @@
 define void @test_femms() optsize {
 ; CHECK-LABEL: test_femms:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    femms
+; CHECK-NEXT:    femms # sched: [100:0.33]
 ; CHECK-NEXT:    retq # sched: [1:1.00]
   call void @llvm.x86.mmx.femms()
   ret void

Modified: llvm/trunk/test/CodeGen/X86/mmx-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-schedule.ll?rev=324897&r1=324896&r2=324897&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-schedule.ll Mon Feb 12 07:52:59 2018
@@ -526,7 +526,7 @@ declare x86_mmx @llvm.x86.sse.cvttps2pi(
 define void @test_emms() optsize {
 ; GENERIC-LABEL: test_emms:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    emms
+; GENERIC-NEXT:    emms # sched: [100:0.33]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; ATOM-LABEL: test_emms:
@@ -536,12 +536,12 @@ define void @test_emms() optsize {
 ;
 ; SLM-LABEL: test_emms:
 ; SLM:       # %bb.0:
-; SLM-NEXT:    emms
+; SLM-NEXT:    emms # sched: [100:1.00]
 ; SLM-NEXT:    retq # sched: [4:1.00]
 ;
 ; SANDY-LABEL: test_emms:
 ; SANDY:       # %bb.0:
-; SANDY-NEXT:    emms
+; SANDY-NEXT:    emms # sched: [100:0.33]
 ; SANDY-NEXT:    retq # sched: [1:1.00]
 ;
 ; HASWELL-LABEL: test_emms:
@@ -566,12 +566,12 @@ define void @test_emms() optsize {
 ;
 ; BTVER2-LABEL: test_emms:
 ; BTVER2:       # %bb.0:
-; BTVER2-NEXT:    emms
+; BTVER2-NEXT:    emms # sched: [100:0.17]
 ; BTVER2-NEXT:    retq # sched: [4:1.00]
 ;
 ; ZNVER1-LABEL: test_emms:
 ; ZNVER1:       # %bb.0:
-; ZNVER1-NEXT:    emms
+; ZNVER1-NEXT:    emms # sched: [100:?]
 ; ZNVER1-NEXT:    retq # sched: [1:0.50]
   call void @llvm.x86.mmx.emms()
   ret void