[PATCH] D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint

[Renato Golin via Phabricator via llvm-commits]

rengolin added a comment.

This goes against the documentation, which only supports sN:
https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html#Machine-Constraints

Though it's not completely wrong to support the low part of D/Q registers, I'm not sure the code in question is making sure this is true.


Repository:
  rL LLVM

https://reviews.llvm.org/D42962