[llvm] r324882 - [mips] Revert rL324869
Simon Atanasyan via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 12 03:15:37 PST 2018
Author: atanasyan
Date: Mon Feb 12 03:15:37 2018
New Revision: 324882
URL: http://llvm.org/viewvc/llvm-project?rev=324882&view=rev
Log:
[mips] Revert rL324869
This commit adds inlineasm-cnstrnt-bad-l.ll which is clashing
with inlineasm-cnstrnt-bad-L.ll on case insensitive file systems.
Removed:
llvm/trunk/test/CodeGen/Mips/inlineasm-cnstrnt-bad-l.ll
Modified:
llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
llvm/trunk/test/CodeGen/Mips/inlineasm-cnstrnt-reg.ll
Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=324882&r1=324881&r2=324882&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Mon Feb 12 03:15:37 2018
@@ -3868,7 +3868,7 @@ MipsTargetLowering::getRegForInlineAsmCo
return std::make_pair(0U, nullptr);
case 'l': // use the `lo` register to store values
// that are no bigger than a word
- if (VT == MVT::i32 || VT == MVT::i16 || VT == MVT::i8)
+ if (VT == MVT::i32)
return std::make_pair((unsigned)Mips::LO0, &Mips::LO32RegClass);
return std::make_pair((unsigned)Mips::LO0_64, &Mips::LO64RegClass);
case 'x': // use the concatenated `hi` and `lo` registers
Removed: llvm/trunk/test/CodeGen/Mips/inlineasm-cnstrnt-bad-l.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/inlineasm-cnstrnt-bad-l.ll?rev=324881&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/inlineasm-cnstrnt-bad-l.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/inlineasm-cnstrnt-bad-l.ll (removed)
@@ -1,13 +0,0 @@
-; Negative test. The constraint 'l' represents the register 'lo'.
-; Check error message in case of invalid usage.
-;
-; RUN: not llc -march=mips -filetype=obj < %s 2>&1 | FileCheck %s
-
-define void @constraint_l() nounwind {
-entry:
-
-; CHECK: error: invalid operand for instruction
-
- tail call i16 asm sideeffect "addiu $0,$1,$2", "=l,r,r,~{$1}"(i16 0, i16 0)
- ret void
-}
Modified: llvm/trunk/test/CodeGen/Mips/inlineasm-cnstrnt-reg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/inlineasm-cnstrnt-reg.ll?rev=324882&r1=324881&r2=324882&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/inlineasm-cnstrnt-reg.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/inlineasm-cnstrnt-reg.ll Mon Feb 12 03:15:37 2018
@@ -41,15 +41,5 @@ entry:
call i32 asm sideeffect "\09mtlo $3 \0A\09\09madd $1, $2 ", "=l,r,r,r"(i32 7, i32 6, i32 44) nounwind
store volatile i32 %4, i32* %bosco, align 4
-; Check the 'l' constraint for 16-bit type.
-; CHECK: #APP
-; CHECK: mtlo ${{[0-9]+}}
-; CHECK-NEXT: madd ${{[0-9]+}}, ${{[0-9]+}}
-; CHECK: #NO_APP
-; CHECK-NEXT: mflo ${{[0-9]+}}
- %bosco16 = alloca i16, align 4
- call i16 asm sideeffect "\09mtlo $3 \0A\09\09madd $1, $2 ", "=l,r,r,r"(i32 7, i32 6, i32 44) nounwind
- store volatile i16 %5, i16* %bosco16, align 4
-
ret i32 0
}
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