[PATCH] D42935: [X86] Use min/max for vector ult/ugt compares if avoids a sign flip.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: test/CodeGen/X86/avx512vl-vec-masked-cmp.ll:16301
 ; NoVLX-NEXT:    vpmovsxbd %xmm0, %zmm0
+; NoVLX-NEXT:    vpslld $31, %zmm0, %zmm0
 ; NoVLX-NEXT:    vptestmd %zmm0, %zmm0, %k0
----------------
RKSimon wrote:
> Is this necessary? Is there anyway that ComputeKnownBits/NumSignBits + SimplifyDemandedBits could be used to remove it?
I believe it's getting tripped up because the vpternlog is a (v16i8 (bitcast (xor (bitcast v2i64))) after legalize. I don't think computeNumSignBits can cross both of those bitcasts very well.

Probably doesn't help that LegalVectorOps visits nodes bottom up so the compare is legalized first, it creates the xor, the xor gets legalized with the bitcatsts. Then the truncate gets legalized, but its too late.

Meanwhile LegalizeDAG visits nodes top down so would probably be able to handle this case since the truncate would legalize first.


Repository:
  rL LLVM

https://reviews.llvm.org/D42935