[PATCH] D43093: [FastISel] Sink local value materializations to first use

Thu Feb 8 15:17:37 PST 2018

rnk created this revision.
rnk added reviewers: aprantl, dblaikie, qcolombet, MatzeB.
Herald added subscribers: hiraditya, javed.absar, sdardis.

Local values are constants, global addresses, and stack addresses that
can't be folded into the instruction that uses them. For example, when
storing the address of a global variable into memory, we need to
materialize that address into a register.

FastISel doesn't want to materialize any given local value more than
once, so it generates all local value materialization code at
EmitStartPt, which always dominates the current insertion point. This
allows it to maintain a map of local value registers, and it knows that
the local value area will always dominate the current insertion point.

One downside of the local value area is that for large basic blocks, the
live ranges of the local values may be large and we may end up spilling
more than we should.

The other downside is that local value instructions are always emitted
without a source location. This is done to prevent jumpy line tables,
but it means that the local value area will be considered part of the
previous statement. Consider this C code:

  call1();      // line 1
  ++global;     // line 2
  ++global;     // line 3
  call2(&global, &local); // line 4

Today we end up with assembly and line tables like this:

  .loc 1 1
  callq call1
  leaq global(%rip), %rdi
  leaq local(%rsp), %rsi
  .loc 1 2
  addq $1, global(%rip)
  .loc 1 3
  addq $1, global(%rip)
  .loc 1 4
  callq call2

The LEA instructions in the local value area have no source location and
are treated as being on line 1. Stepping through the code in a debugger
and correlating it with the assembly won't make much sense, because
these materializations are only required for line 4.

This is actually problematic for the VS debugger "set next statement"
feature, which effectively assumes that there are no registers live
across statement boundaries. By sinking the local value code into the
statement and fixing up the source location, we can make that feature
work. This was filed as https://bugs.llvm.org/show_bug.cgi?id=35975 and
https://crbug.com/793819.

This change is obviously not enough to make this feature work reliably
in all cases, but I felt that it was worth doing anyway because it
usually generates smaller, more comprehensible -O0 code.  If people feel
that this is not worth the complexity or -O0 compile time, my next idea
is to teach clang to emit one basic block per statement. My
understanding is that fast regalloc will not register allocate across
basic blocks, and that will be enough for VS users.

I have not measured the impact on -O0 compile time yet, and would
appreciate any ideas for how to do that.

There are some special cases worth calling out in the commit message:

1. local values materialized for phis
2. local values used by no-op casts
3. dead local value code

Local values can be materialized for phis, and this does not show up as
a vreg use in MachineRegisterInfo. In this case, if there are no other
uses, this patch sinks the value to the first terminator, EH label, or
the end of the BB if nothing else exists.

Local values may also be used by no-op casts, which adds the register to
the RegFixups table. Without reversing the RegFixups map direction, we
don't have enough information to sink these instructions.

Lastly, if the local value register has no other uses, we can delete it.
This comes up when fastisel tries two instruction selection approaches
and the first materializes the value but fails and the second succeeds
without using the local value.

https://reviews.llvm.org/D43093

Files:
  llvm/include/llvm/CodeGen/FastISel.h
  llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
  llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
  llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  llvm/test/CodeGen/AArch64/arm64-abi_align.ll
  llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll
  llvm/test/CodeGen/AArch64/arm64-fast-isel-gv.ll
  llvm/test/CodeGen/AArch64/arm64-fast-isel-intrinsic.ll
  llvm/test/CodeGen/AArch64/arm64-fast-isel.ll
  llvm/test/CodeGen/AArch64/arm64-patchpoint-webkit_jscc.ll
  llvm/test/CodeGen/AArch64/swifterror.ll
  llvm/test/CodeGen/ARM/fast-isel-call.ll
  llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
  llvm/test/CodeGen/ARM/fast-isel-select.ll
  llvm/test/CodeGen/ARM/fast-isel-vararg.ll
  llvm/test/CodeGen/ARM/swifterror.ll
  llvm/test/CodeGen/Mips/Fast-ISel/callabi.ll
  llvm/test/CodeGen/Mips/Fast-ISel/simplestore.ll
  llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll
  llvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll
  llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll
  llvm/test/CodeGen/X86/fast-isel-call-cleanup.ll
  llvm/test/CodeGen/X86/fast-isel-store.ll
  llvm/test/CodeGen/X86/inreg.ll
  llvm/test/CodeGen/X86/pr32241.ll
  llvm/test/CodeGen/X86/pr32284.ll
  llvm/test/CodeGen/X86/pr32340.ll
  llvm/test/CodeGen/X86/pr32345.ll
  llvm/test/CodeGen/X86/pr32484.ll
  llvm/test/CodeGen/X86/sink-local-value.ll
  llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
  llvm/test/CodeGen/X86/win32_sret.ll
  llvm/test/DebugInfo/COFF/lines-bb-start.ll
  llvm/test/DebugInfo/Mips/delay-slot.ll
  llvm/test/DebugInfo/X86/debug-loc-asan.ll
  llvm/test/DebugInfo/X86/prologue-stack.ll

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