[PATCH] D35267: Pass Divergence Analysis data to selection DAG to drive divergence dependent instruction selection

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

If we're going to include the "divergent" bit in SDNodes, so we can query it all the time, the bit needs to be correct all the time.  The goal of a verifier is to ensure that at any given point, the bits stored in the SelectionDAG are the same as the bits we would compute from scratch.  So code still needs to do the right thing to update the divergence bits, if necessary, but the verifier lets us catch mistakes early.  This is similar to the way we have a domtree verifier, to ensure transforms correctly update the domtree.


https://reviews.llvm.org/D35267