[llvm] r324635 - [InstCombine] Add vector udiv tests
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 8 10:58:01 PST 2018
Author: rksimon
Date: Thu Feb 8 10:58:00 2018
New Revision: 324635
URL: http://llvm.org/viewvc/llvm-project?rev=324635&view=rev
Log:
[InstCombine] Add vector udiv tests
Tests for X udiv C, where C >= signbit
Modified:
llvm/trunk/test/Transforms/InstCombine/vector-udiv.ll
Modified: llvm/trunk/test/Transforms/InstCombine/vector-udiv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/vector-udiv.ll?rev=324635&r1=324634&r2=324635&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/vector-udiv.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/vector-udiv.ll Thu Feb 8 10:58:00 2018
@@ -19,6 +19,33 @@ define <4 x i32> @test_v4i32_const_pow2(
ret <4 x i32> %1
}
+; X udiv C, where C >= signbit
+define <4 x i32> @test_v4i32_negconstsplat(<4 x i32> %a0) {
+; CHECK-LABEL: @test_v4i32_negconstsplat(
+; CHECK-NEXT: [[TMP1:%.*]] = udiv <4 x i32> [[A0:%.*]], <i32 -3, i32 -3, i32 -3, i32 -3>
+; CHECK-NEXT: ret <4 x i32> [[TMP1]]
+;
+ %1 = udiv <4 x i32> %a0, <i32 -3, i32 -3, i32 -3, i32 -3>
+ ret <4 x i32> %1
+}
+
+define <4 x i32> @test_v4i32_negconst(<4 x i32> %a0) {
+; CHECK-LABEL: @test_v4i32_negconst(
+; CHECK-NEXT: [[TMP1:%.*]] = udiv <4 x i32> [[A0:%.*]], <i32 -3, i32 -5, i32 -7, i32 -9>
+; CHECK-NEXT: ret <4 x i32> [[TMP1]]
+;
+ %1 = udiv <4 x i32> %a0, <i32 -3, i32 -5, i32 -7, i32 -9>
+ ret <4 x i32> %1
+}
+
+define <4 x i32> @test_v4i32_negconst_undef(<4 x i32> %a0) {
+; CHECK-LABEL: @test_v4i32_negconst_undef(
+; CHECK-NEXT: ret <4 x i32> undef
+;
+ %1 = udiv <4 x i32> %a0, <i32 -3, i32 -5, i32 -7, i32 undef>
+ ret <4 x i32> %1
+}
+
; X udiv (C1 << N), where C1 is "1<<C2" --> X >> (N+C2)
define <4 x i32> @test_v4i32_shl_splatconst_pow2(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: @test_v4i32_shl_splatconst_pow2(
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