[PATCH v2] [X86] Support 'V' register operand modifier

[Chandler Carruth via llvm-commits]

This looks pretty good to me, but Craig should probably have a look before
it lands.

If you don't have commit access, you may need to send it as an attachment
-- my email client at least destroys the patch file when in-line so that I
can't apply it and commit it easily for you.

Also, thanks again for jumping on this piece!

On Thu, Feb 8, 2018 at 3:14 AM David Woodhouse via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> This allows the register name to be printed without the leading '%'.
> This can be used for emitting calls to the retpoline thunks from inline
> asm.
> ---
> v2: fix 'call' expectation in test cases for -no-integrated-as
>
>  lib/Target/X86/X86AsmPrinter.cpp          | 11 ++++++++++-
>  test/CodeGen/X86/inline-asm-modifier-V.ll | 14 ++++++++++++++
>  2 files changed, 24 insertions(+), 1 deletion(-)
>  create mode 100644 test/CodeGen/X86/inline-asm-modifier-V.ll
>
> diff --git a/lib/Target/X86/X86AsmPrinter.cpp
> b/lib/Target/X86/X86AsmPrinter.cpp
> index 4da7d59df46..991a81c8f11 100644
> --- a/lib/Target/X86/X86AsmPrinter.cpp
> +++ b/lib/Target/X86/X86AsmPrinter.cpp
> @@ -370,6 +370,8 @@ static void printIntelMemReference(X86AsmPrinter &P,
> const MachineInstr *MI,
>  static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO,
>                                char Mode, raw_ostream &O) {
>    unsigned Reg = MO.getReg();
> +  bool EmitPercent = true;
> +
>    switch (Mode) {
>    default: return true;  // Unknown mode.
>    case 'b': // Print QImode register
> @@ -384,6 +386,9 @@ static bool printAsmMRegister(X86AsmPrinter &P, const
> MachineOperand &MO,
>    case 'k': // Print SImode register
>      Reg = getX86SubSuperRegister(Reg, 32);
>      break;
> +  case 'V':
> +    EmitPercent = false;
> +    LLVM_FALLTHROUGH;
>    case 'q':
>      // Print 64-bit register names if 64-bit integer registers are
> available.
>      // Otherwise, print 32-bit register names.
> @@ -391,7 +396,10 @@ static bool printAsmMRegister(X86AsmPrinter &P, const
> MachineOperand &MO,
>      break;
>    }
>
> -  O << '%' << X86ATTInstPrinter::getRegisterName(Reg);
> +  if (EmitPercent)
> +    O << '%';
> +
> +  O << X86ATTInstPrinter::getRegisterName(Reg);
>    return false;
>  }
>
> @@ -464,6 +472,7 @@ bool X86AsmPrinter::PrintAsmOperand(const MachineInstr
> *MI, unsigned OpNo,
>      case 'w': // Print HImode register
>      case 'k': // Print SImode register
>      case 'q': // Print DImode register
> +    case 'V': // Print native register without '%'
>        if (MO.isReg())
>          return printAsmMRegister(*this, MO, ExtraCode[0], O);
>        printOperand(*this, MI, OpNo, O);
> diff --git a/test/CodeGen/X86/inline-asm-modifier-V.ll
> b/test/CodeGen/X86/inline-asm-modifier-V.ll
> new file mode 100644
> index 00000000000..5a7f3fdd25f
> --- /dev/null
> +++ b/test/CodeGen/X86/inline-asm-modifier-V.ll
> @@ -0,0 +1,14 @@
> +; RUN: llc < %s -mtriple=i686-- -no-integrated-as | FileCheck
> -check-prefix=X86 %s
> +; RUN: llc < %s -mtriple=x86_64-- -no-integrated-as | FileCheck
> -check-prefix=X64 %s
> +
> +; If the target does not have 64-bit integer registers, emit 32-bit
> register
> +; names.
> +
> +; X86: call __x86_indirect_thunk_e{{[abcd]}}x
> +; X64: call __x86_indirect_thunk_r
> +
> +define void @q_modifier(i32* %p) {
> +entry:
> +  tail call void asm sideeffect "call __x86_indirect_thunk_${0:V}",
> "r,~{dirflag},~{fpsr},~{flags}"(i32* %p)
> +  ret void
> +}
> --
> 2.14.3
>
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