[PATCH] D43050: [X86][MC] Fix assembling rip-relative addressing + immediate displacements
Francis Visoiu Mistrih via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 7 16:11:48 PST 2018
thegameg created this revision.
thegameg added reviewers: craig.topper, rafael.
In the rare case where the input contains rip-relative addressing with immediate displacements, *and* the instruction ends with an immediate, we encode the instruction in the wrong way:
movl $12345678, 0x400(%rdi) // all good, no rip-relative addr
movl %eax, 0x400(%rip) // all good, no immediate at the end of the instruction
movl $12345678, 0x400(%rip) // fails, encodes address as 0x3fc(%rip)
- Offset is a label:
movl $12345678, foo(%rip)
we want to account for the size of the immediate (in this case, $12345678, 4 bytes) in the relocation value.
- Offset is an immediate:
movl $12345678, 0x400(%rip)
we should not account for the size of the immediate, assuming the immediate offset is what the user wanted.
https://reviews.llvm.org/D43050
Files:
lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
test/MC/X86/x86-64.s
Index: test/MC/X86/x86-64.s
===================================================================
--- test/MC/X86/x86-64.s
+++ test/MC/X86/x86-64.s
@@ -622,6 +622,11 @@
// CHECK: encoding: [0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00]
// CHECK: fixup A - offset: 2, value: foo-8, kind: reloc_riprel_4byte
+// rdar://37247000
+movl $12, 1024(%rip)
+// CHECK: movl $12, 1024(%rip)
+// CHECK: encoding: [0xc7,0x05,0x00,0x04,0x00,0x00,0x0c,0x00,0x00,0x00]
+
movq $12, foo(%rip)
// CHECK: movq $12, foo(%rip)
// CHECK: encoding: [0x48,0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00]
Index: lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
===================================================================
--- lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -396,10 +396,14 @@
// rip-relative addressing is actually relative to the *next* instruction.
// Since an immediate can follow the mod/rm byte for an instruction, this
- // means that we need to bias the immediate field of the instruction with
- // the size of the immediate field. If we have this case, add it into the
+ // means that we need to bias the displacement field of the instruction with
+ // the size of the immediate field. If we have this case, add it into the
// expression to emit.
- int ImmSize = X86II::hasImm(TSFlags) ? X86II::getSizeOfImm(TSFlags) : 0;
+ // Note: rip-relative addressing using immediate displacement values should
+ // not be adjusted, assuming it was the user's intent.
+ int ImmSize = !Disp.isImm() && X86II::hasImm(TSFlags)
+ ? X86II::getSizeOfImm(TSFlags)
+ : 0;
EmitImmediate(Disp, MI.getLoc(), 4, MCFixupKind(FixupKind),
CurByte, OS, Fixups, -ImmSize);
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D43050.133329.patch
Type: text/x-patch
Size: 1811 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180208/fed6b027/attachment.bin>
More information about the llvm-commits
mailing list