[PATCH] D42732: [x86] Fix nasty bug in the x86 backend that is essentially impossible to hit from IR but creates a minefield for MI passes.

[Rafael Avila de Espindola via llvm-commits]

Chandler Carruth via Phabricator via llvm-commits
<llvm-commits at lists.llvm.org> writes:


> +# CHECK-LABEL: or:
> +name: or
> +alignment: 4
> +tracksRegLiveness: true
> +registers:
> +  - { id: 0, class: gr64 }
> +  - { id: 1, class: gr64 }
> +  - { id: 2, class: gr64 }
> +  - { id: 3, class: gr64 }
> +  - { id: 4, class: gr32 }
> +body: |
> +  bb.0.entry:
> +    %0:gr64 = MOV64rm $rip, 1, $noreg, @x, $noreg :: (load 8)
> +    %1:gr64 = OR64ri8 %0, 7, implicit-def dead $eflags
> +    %2:gr64 = MOV64rm $rip, 1, $noreg, target-flags(x86-gottpoff) @i, $noreg :: (load 8)
> +    %3:gr64 = OR64rr %2, %1, implicit-def dead $eflags
> +  ; CHECK-NOT: orq {{.*}}GOTTPOFF{{.*}}

You probably also want to CHECK what is actually produced.

> +    %4:gr32 = MOV32rm killed %3, 1, $noreg, 0, $fs :: (load 4)
> +    $eax = COPY %4
> +    RET 0, $eax
> +
> +...
> +---
> +# CHECK-LABEL: and:
> +name: and
> +alignment: 4
> +tracksRegLiveness: true
> +registers:
> +  - { id: 0, class: gr64 }
> +  - { id: 1, class: gr64 }
> +  - { id: 2, class: gr64 }
> +  - { id: 3, class: gr64 }
> +  - { id: 4, class: gr32 }
> +body: |
> +  bb.0.entry:
> +    %0:gr64 = MOV64rm $rip, 1, $noreg, @x, $noreg :: (load 8)
> +    %1:gr64 = OR64ri8 %0, 7, implicit-def dead $eflags
> +    %2:gr64 = MOV64rm $rip, 1, $noreg, target-flags(x86-gottpoff) @i, $noreg :: (load 8)
> +    %3:gr64 = AND64rr %2, %1, implicit-def dead $eflags
> +  ; CHECK-NOT: andq {{.*}}GOTTPOFF{{.*}}

In here too.


LGTM with that.

Cheers,
Rafael