[PATCH] D42981: [COST] Fix cost model of load instructions on X86

[Alexey Bataev via Phabricator via llvm-commits]

ABataev created this revision.
ABataev added reviewers: RKSimon, spatel, mkuper, hfinkel.

Many of the scalar X86 instructions allow to use memory references directly,
without preliminary loading to registers. Cost model for X86 target does
not take into account this situation. This patch considers the cost of
the load instruction as 0, if this is the only load instruction in the
binary instruction, that supports loading from memory or if this is only
the second load instruction.


Repository:
  rL LLVM

https://reviews.llvm.org/D42981

Files:
  lib/Target/X86/X86TargetTransformInfo.cpp
  lib/Transforms/Vectorize/SLPVectorizer.cpp
  test/Analysis/CostModel/X86/interleaved-load-i8.ll
  test/Analysis/CostModel/X86/vectorized-loop.ll
  test/Transforms/SLPVectorizer/X86/arith-add.ll
  test/Transforms/SLPVectorizer/X86/arith-mul.ll
  test/Transforms/SLPVectorizer/X86/arith-sub.ll
  test/Transforms/SLPVectorizer/X86/extract_in_tree_user.ll
  test/Transforms/SLPVectorizer/X86/horizontal.ll
  test/Transforms/SLPVectorizer/X86/reduction_unrolled.ll

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