[PATCH] D42979: [ARM] Add 'fillValidCPUArchList' to ARM targets
Erich Keane via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 6 11:06:22 PST 2018
erichkeane created this revision.
erichkeane added reviewers: fhahn, craig.topper, rengolin, echristo.
Herald added subscribers: kristof.beyls, aemerson.
This is a support change for a CFE change (https://reviews.llvm.org/D42978)
that allows march and -target-cpu to list the valid targets in a note. The changes
are limited to the ARM/AArch64, since this is the only target that gets the CPU
list from LLVM.
Repository:
rL LLVM
https://reviews.llvm.org/D42979
Files:
include/llvm/Support/TargetParser.h
lib/Support/TargetParser.cpp
Index: lib/Support/TargetParser.cpp
===================================================================
--- lib/Support/TargetParser.cpp
+++ lib/Support/TargetParser.cpp
@@ -689,6 +689,20 @@
return ARM::ArchKind::INVALID;
}
+void llvm::ARM::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
+#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
+ if (ARM::ArchKind::ID != ARM::ArchKind::INVALID) \
+ Values.emplace_back(NAME);
+#include "llvm/Support/ARMTargetParser.def"
+}
+
+void llvm::AArch64::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
+#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
+ if (AArch64::ArchKind::ID != AArch64::ArchKind::INVALID) \
+ Values.emplace_back(NAME);
+#include "llvm/Support/AArch64TargetParser.def"
+}
+
// ARM, Thumb, AArch64
ARM::ISAKind ARM::parseArchISA(StringRef Arch) {
return StringSwitch<ARM::ISAKind>(Arch)
Index: include/llvm/Support/TargetParser.h
===================================================================
--- include/llvm/Support/TargetParser.h
+++ include/llvm/Support/TargetParser.h
@@ -18,6 +18,7 @@
// FIXME: vector is used because that's what clang uses for subtarget feature
// lists, but SmallVector would probably be better
#include "llvm/ADT/Triple.h"
+#include "llvm/ADT/SmallString.h"
#include <vector>
namespace llvm {
@@ -137,6 +138,7 @@
ArchKind parseArch(StringRef Arch);
unsigned parseArchExt(StringRef ArchExt);
ArchKind parseCPUArch(StringRef CPU);
+void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
ISAKind parseArchISA(StringRef Arch);
EndianKind parseArchEndian(StringRef Arch);
ProfileKind parseArchProfile(StringRef Arch);
@@ -205,6 +207,7 @@
AArch64::ArchKind parseArch(StringRef Arch);
ArchExtKind parseArchExt(StringRef ArchExt);
ArchKind parseCPUArch(StringRef CPU);
+void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
ARM::ISAKind parseArchISA(StringRef Arch);
ARM::EndianKind parseArchEndian(StringRef Arch);
ARM::ProfileKind parseArchProfile(StringRef Arch);
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