[PATCH] D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint
Oliver Stannard via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 6 08:01:40 PST 2018
olista01 added inline comments.
================
Comment at: lib/Target/ARM/ARMISelLowering.cpp:13462
break;
if (VT == MVT::f32)
return RCPair(0U, &ARM::SPR_8RegClass);
----------------
It looks like we also differ from GCC in what types we accept for 32-bit operands. GCC seems to accept integers for the 'w', 'x' and 't' constraints, but for some reason we only do that for 't'. Maybe these should also be switched to using getSizeInBits for 32-bit operands?
Using integer operands in S/D registers is useful because of the float<->int conversion instructions.
Repository:
rL LLVM
https://reviews.llvm.org/D42962
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