[llvm] r324349 - [Hexagon] Add helper functions to identify single/pair vector types, NFC
Krzysztof Parzyszek via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 6 06:21:31 PST 2018
Author: kparzysz
Date: Tue Feb 6 06:21:31 2018
New Revision: 324349
URL: http://llvm.org/viewvc/llvm-project?rev=324349&view=rev
Log:
[Hexagon] Add helper functions to identify single/pair vector types, NFC
Modified:
llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.h
llvm/trunk/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
Modified: llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.h?rev=324349&r1=324348&r2=324349&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.h (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.h Tue Feb 6 06:21:31 2018
@@ -362,6 +362,8 @@ namespace HexagonISD {
VectorPair opSplit(SDValue Vec, const SDLoc &dl, SelectionDAG &DAG) const;
SDValue opCastElem(SDValue Vec, MVT ElemTy, SelectionDAG &DAG) const;
+ bool isHvxSingleTy(MVT Ty) const;
+ bool isHvxPairTy(MVT Ty) const;
SDValue convertToByteIndex(SDValue ElemIdx, MVT ElemTy,
SelectionDAG &DAG) const;
SDValue getIndexInWord32(SDValue Idx, MVT ElemTy, SelectionDAG &DAG) const;
Modified: llvm/trunk/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp?rev=324349&r1=324348&r2=324349&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp Tue Feb 6 06:21:31 2018
@@ -78,6 +78,18 @@ HexagonTargetLowering::opSplit(SDValue V
return DAG.SplitVector(Vec, dl, Tys.first, Tys.second);
}
+bool
+HexagonTargetLowering::isHvxSingleTy(MVT Ty) const {
+ return Subtarget.isHVXVectorType(Ty) &&
+ Ty.getSizeInBits() == 8 * Subtarget.getVectorLength();
+}
+
+bool
+HexagonTargetLowering::isHvxPairTy(MVT Ty) const {
+ return Subtarget.isHVXVectorType(Ty) &&
+ Ty.getSizeInBits() == 16 * Subtarget.getVectorLength();
+}
+
SDValue
HexagonTargetLowering::convertToByteIndex(SDValue ElemIdx, MVT ElemTy,
SelectionDAG &DAG) const {
@@ -503,7 +515,7 @@ HexagonTargetLowering::extractHvxSubvect
// If the source vector is a vector pair, get the single vector containing
// the subvector of interest. The subvector will never overlap two single
// vectors.
- if (VecTy.getSizeInBits() == 16*HwLen) {
+ if (isHvxPairTy(VecTy)) {
unsigned SubIdx;
if (Idx * ElemWidth >= 8*HwLen) {
SubIdx = Hexagon::vsub_hi;
@@ -609,7 +621,7 @@ HexagonTargetLowering::insertHvxSubvecto
MVT ElemTy = VecTy.getVectorElementType();
unsigned ElemWidth = ElemTy.getSizeInBits();
- bool IsPair = VecTy.getSizeInBits() == 16*HwLen;
+ bool IsPair = isHvxPairTy(VecTy);
MVT SingleTy = MVT::getVectorVT(ElemTy, (8*HwLen)/ElemWidth);
// The two single vectors that VecV consists of, if it's a pair.
SDValue V0, V1;
@@ -623,7 +635,7 @@ HexagonTargetLowering::insertHvxSubvecto
SDValue HalfV = DAG.getConstant(SingleTy.getVectorNumElements(),
dl, MVT::i32);
PickHi = DAG.getSetCC(dl, MVT::i1, IdxV, HalfV, ISD::SETUGT);
- if (SubTy.getSizeInBits() == 8*HwLen) {
+ if (isHvxSingleTy(SubTy)) {
if (const auto *CN = dyn_cast<const ConstantSDNode>(IdxV.getNode())) {
unsigned Idx = CN->getZExtValue();
assert(Idx == 0 || Idx == VecTy.getVectorNumElements()/2);
More information about the llvm-commits
mailing list