[PATCH] D42295: [AArch64][SVE] Asm: Add AND_ZI instructions and aliases

[Florian Hahn via Phabricator via llvm-commits]

fhahn accepted this revision.
fhahn added a comment.
This revision is now accepted and ready to land.

LGTM



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Comment at: lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp:1666
+  DecodeZPRRegisterClass(Inst, Zdn, Addr, Decoder);
+  DecodeZPRRegisterClass(Inst, Zdn, Addr, Decoder);
+  Inst.addOperand(MCOperand::createImm(imm));
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sdesmalen wrote:
> fhahn wrote:
> > Is this exactly the same as above?
> The same (tied) operand is added twice to the instruction, see line 470.
Ah thanks. That might be worth a comment.


https://reviews.llvm.org/D42295