[PATCH] D42808: [X86] Teach DAG unfoldMemoryOperand to reconvert CMPs to tests
Nirav Dave via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 5 11:02:46 PST 2018
This revision was automatically updated to reflect the committed changes.
Closed by commit rL324261: [X86] Teach DAG unfoldMemoryOperand to reconvert CMPs to tests (authored by niravd, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D42808?vs=132848&id=132861#toc
Repository:
rL LLVM
https://reviews.llvm.org/D42808
Files:
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
llvm/trunk/test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll
Index: llvm/trunk/test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll
+++ llvm/trunk/test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll
@@ -1,6 +1,6 @@
; RUN: llvm-as <%s | llc | FileCheck %s
; PR 5247
-; check that cmp is not scheduled before the add
+; check that cmp/test is not scheduled before the add
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
@@ -38,7 +38,7 @@
%5 = sub i64 %4, %2 ; <i64> [#uses=1]
%6 = atomicrmw add i64* getelementptr inbounds ([1216 x i64], [1216 x i64]* @__profiling_callsite_timestamps_live, i32 0, i32 51), i64 %5 monotonic
;CHECK: lock {{xadd|addq}} %rdx, __profiling_callsite_timestamps_live
-;CHECK-NEXT: cmpl $0,
+;CHECK-NEXT: testl [[REG:%e[a-z]+]], [[REG]]
;CHECK-NEXT: jne
%cmp = icmp eq i32 %3, 0 ; <i1> [#uses=1]
br i1 %cmp, label %if.then, label %if.end
Index: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
@@ -9223,6 +9223,30 @@
if (Load)
BeforeOps.push_back(SDValue(Load, 0));
BeforeOps.insert(BeforeOps.end(), AfterOps.begin(), AfterOps.end());
+ // Change CMP32ri r, 0 back to TEST32rr r, r, etc.
+ switch (Opc) {
+ default: break;
+ case X86::CMP64ri32:
+ case X86::CMP64ri8:
+ case X86::CMP32ri:
+ case X86::CMP32ri8:
+ case X86::CMP16ri:
+ case X86::CMP16ri8:
+ case X86::CMP8ri:
+ if (isNullConstant(BeforeOps[1])) {
+ switch (Opc) {
+ default: llvm_unreachable("Unreachable!");
+ case X86::CMP64ri8:
+ case X86::CMP64ri32: Opc = X86::TEST64rr; break;
+ case X86::CMP32ri8:
+ case X86::CMP32ri: Opc = X86::TEST32rr; break;
+ case X86::CMP16ri8:
+ case X86::CMP16ri: Opc = X86::TEST16rr; break;
+ case X86::CMP8ri: Opc = X86::TEST8rr; break;
+ }
+ BeforeOps[1] = BeforeOps[0];
+ }
+ }
SDNode *NewNode= DAG.getMachineNode(Opc, dl, VTs, BeforeOps);
NewNodes.push_back(NewNode);
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