[PATCH] D42295: [AArch64][SVE] Asm: Add AND_ZI instructions and aliases
Florian Hahn via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 5 06:12:38 PST 2018
fhahn added inline comments.
================
Comment at: lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp:1666
+ DecodeZPRRegisterClass(Inst, Zdn, Addr, Decoder);
+ DecodeZPRRegisterClass(Inst, Zdn, Addr, Decoder);
+ Inst.addOperand(MCOperand::createImm(imm));
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Is this exactly the same as above?
================
Comment at: lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h:769
+
+ return MatchingElements;
+}
----------------
I think the logic here could be made slightly clearer using std::all_of
https://reviews.llvm.org/D42295
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