[PATCH] D42881: AMDGPU: Fix S_BUFFER_LOAD_DWORD_SGPR moveToVALU.
Bas Nieuwenhuizen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Feb 3 05:53:46 PST 2018
bnieuwenhuizen created this revision.
bnieuwenhuizen added reviewers: mareko, nhaehnle, arsenm.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, wdng, kzhuravl.
It moves the offset to vgpr, but did not handle being called for
any of the other arguments, while LLVM 5 would select
BUFFER_LOAD_DWORD_OFFEN immediately, which does the right thing.
This calls legalizeOperands to fix up the operands after we converted
to a BUFFER_LOAD_DWORD_OFFEN.
Repository:
rL LLVM
https://reviews.llvm.org/D42881
Files:
lib/Target/AMDGPU/SIInstrInfo.cpp
Index: lib/Target/AMDGPU/SIInstrInfo.cpp
===================================================================
--- lib/Target/AMDGPU/SIInstrInfo.cpp
+++ lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -3797,21 +3797,26 @@
}
}
- BuildMI(*MBB, Inst, Inst.getDebugLoc(),
+ MachineInstr *NewInstr =
+ BuildMI(*MBB, Inst, Inst.getDebugLoc(),
get(AMDGPU::BUFFER_LOAD_DWORD_OFFEN), VDst)
.add(*VAddr) // vaddr
.add(*getNamedOperand(Inst, AMDGPU::OpName::sbase)) // srsrc
.addImm(0) // soffset
.addImm(Offset) // offset
.addImm(getNamedOperand(Inst, AMDGPU::OpName::glc)->getImm())
.addImm(0) // slc
.addImm(0) // tfe
- .setMemRefs(Inst.memoperands_begin(), Inst.memoperands_end());
+ .setMemRefs(Inst.memoperands_begin(), Inst.memoperands_end())
+ .getInstr();
MRI.replaceRegWith(getNamedOperand(Inst, AMDGPU::OpName::sdst)->getReg(),
VDst);
addUsersToMoveToVALUWorklist(VDst, MRI, Worklist);
Inst.eraseFromParent();
+
+ // Legalize all operands other than the offset.
+ legalizeOperands(*NewInstr);
continue;
}
}
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