[PATCH] D42849: [ARM] Armv8.2-A FP16 code generation (part 3/3)

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer created this revision.
SjoerdMeijer added reviewers: samparker, olista01, t.p.northover, eli.friedman.
Herald added subscribers: kristof.beyls, javed.absar, aemerson.

  This adds FP16 codegen support for the A32 instruction set.
  
  These areas need further work:
  - FP16 literals and immediates are not properly supported yet
    (e.g. literal pool needs work),
  - instructions that are generated from intrinsics (e.g. vabs)
    haven't been added.
  - the T32 instructions need to be tested.
  
  This will be addressed in follow-up patches.


https://reviews.llvm.org/D42849

Files:
  lib/Target/ARM/ARMISelLowering.cpp
  lib/Target/ARM/ARMISelLowering.h
  lib/Target/ARM/ARMInstrVFP.td
  test/CodeGen/ARM/fp16-instructions.ll

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