[PATCH] D40955: [AMDGPU] Make the new addr space mapping default
Yaxun Liu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 2 08:12:57 PST 2018
This revision was automatically updated to reflect the committed changes.
Closed by commit rL324101: [AMDGPU] Switch to the new addr space mapping by default (authored by yaxunl, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D40955?vs=132256&id=132603#toc
Repository:
rL LLVM
https://reviews.llvm.org/D40955
Files:
llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
llvm/trunk/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
llvm/trunk/test/Analysis/CostModel/AMDGPU/addrspacecast.ll
llvm/trunk/test/CodeGen/AMDGPU/InlineAsmCrash.ll
llvm/trunk/test/CodeGen/AMDGPU/addrspacecast.ll
llvm/trunk/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
llvm/trunk/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
llvm/trunk/test/CodeGen/AMDGPU/amdgpu-inline.ll
llvm/trunk/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
llvm/trunk/test/CodeGen/AMDGPU/amdpal.ll
llvm/trunk/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
llvm/trunk/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll
llvm/trunk/test/CodeGen/AMDGPU/byval-frame-setup.ll
llvm/trunk/test/CodeGen/AMDGPU/call-argument-types.ll
llvm/trunk/test/CodeGen/AMDGPU/call-graph-register-usage.ll
llvm/trunk/test/CodeGen/AMDGPU/callee-frame-setup.ll
llvm/trunk/test/CodeGen/AMDGPU/callee-special-input-sgprs.ll
llvm/trunk/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
llvm/trunk/test/CodeGen/AMDGPU/captured-frame-index.ll
llvm/trunk/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
llvm/trunk/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
llvm/trunk/test/CodeGen/AMDGPU/collapse-endcf.ll
llvm/trunk/test/CodeGen/AMDGPU/commute-compares.ll
llvm/trunk/test/CodeGen/AMDGPU/copy-to-reg.ll
llvm/trunk/test/CodeGen/AMDGPU/extload-private.ll
llvm/trunk/test/CodeGen/AMDGPU/flat-address-space.ll
llvm/trunk/test/CodeGen/AMDGPU/flat-for-global-subtarget-feature.ll
llvm/trunk/test/CodeGen/AMDGPU/flat_atomics.ll
llvm/trunk/test/CodeGen/AMDGPU/flat_atomics_i64.ll
llvm/trunk/test/CodeGen/AMDGPU/frame-index-elimination.ll
llvm/trunk/test/CodeGen/AMDGPU/function-args.ll
llvm/trunk/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ir-full.ll
llvm/trunk/test/CodeGen/AMDGPU/huge-private-buffer.ll
llvm/trunk/test/CodeGen/AMDGPU/indirect-private-64.ll
llvm/trunk/test/CodeGen/AMDGPU/insert_subreg.ll
llvm/trunk/test/CodeGen/AMDGPU/inserted-wait-states.mir
llvm/trunk/test/CodeGen/AMDGPU/kernarg-stack-alignment.ll
llvm/trunk/test/CodeGen/AMDGPU/large-alloca-compute.ll
llvm/trunk/test/CodeGen/AMDGPU/large-alloca-graphics.ll
llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.implicit.buffer.ptr.ll
llvm/trunk/test/CodeGen/AMDGPU/load-hi16.ll
llvm/trunk/test/CodeGen/AMDGPU/load-lo16.ll
llvm/trunk/test/CodeGen/AMDGPU/local-stack-slot-offset.ll
llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-atomic-cmpxchg.ll
llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-atomic-rmw.ll
llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-invalid-syncscope.ll
llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-load.ll
llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-store.ll
llvm/trunk/test/CodeGen/AMDGPU/move-to-valu-worklist.ll
llvm/trunk/test/CodeGen/AMDGPU/mubuf-offset-private.ll
llvm/trunk/test/CodeGen/AMDGPU/nested-calls.ll
llvm/trunk/test/CodeGen/AMDGPU/parallelandifcollapse.ll
llvm/trunk/test/CodeGen/AMDGPU/private-access-no-objects.ll
llvm/trunk/test/CodeGen/AMDGPU/private-element-size.ll
llvm/trunk/test/CodeGen/AMDGPU/private-memory-atomics.ll
llvm/trunk/test/CodeGen/AMDGPU/promote-alloca-bitcast-function.ll
llvm/trunk/test/CodeGen/AMDGPU/promote-alloca-calling-conv.ll
llvm/trunk/test/CodeGen/AMDGPU/promote-alloca-globals.ll
llvm/trunk/test/CodeGen/AMDGPU/promote-alloca-no-opts.ll
llvm/trunk/test/CodeGen/AMDGPU/promote-alloca-padding-size-estimate.ll
llvm/trunk/test/CodeGen/AMDGPU/promote-alloca-stored-pointer-value.ll
llvm/trunk/test/CodeGen/AMDGPU/r600.alu-limits.ll
llvm/trunk/test/CodeGen/AMDGPU/r600.private-memory.ll
llvm/trunk/test/CodeGen/AMDGPU/sad.ll
llvm/trunk/test/CodeGen/AMDGPU/scratch-buffer.ll
llvm/trunk/test/CodeGen/AMDGPU/shl_add_ptr.ll
llvm/trunk/test/CodeGen/AMDGPU/spill-empty-live-interval.mir
llvm/trunk/test/CodeGen/AMDGPU/stack-size-overflow.ll
llvm/trunk/test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir
llvm/trunk/test/CodeGen/AMDGPU/store-hi16.ll
llvm/trunk/test/CodeGen/AMDGPU/store-private.ll
llvm/trunk/test/CodeGen/AMDGPU/store-vector-ptrs.ll
llvm/trunk/test/CodeGen/AMDGPU/syncscopes.ll
llvm/trunk/test/CodeGen/AMDGPU/target-cpu.ll
llvm/trunk/test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir
llvm/trunk/test/CodeGen/AMDGPU/vop-shrink-frame-index.mir
llvm/trunk/test/CodeGen/AMDGPU/waitcnt-flat.ll
llvm/trunk/test/CodeGen/AMDGPU/waitcnt-looptest.ll
llvm/trunk/test/CodeGen/AMDGPU/waitcnt.mir
llvm/trunk/test/CodeGen/AMDGPU/wqm.ll
llvm/trunk/test/DebugInfo/AMDGPU/code-pointer-size.ll
llvm/trunk/test/DebugInfo/AMDGPU/dwarfdump-relocs.ll
llvm/trunk/test/DebugInfo/AMDGPU/pointer-address-space.ll
llvm/trunk/test/DebugInfo/AMDGPU/variable-locations.ll
llvm/trunk/test/Transforms/CodeGenPrepare/AMDGPU/sink-addrspacecast.ll
llvm/trunk/test/Transforms/InferAddressSpaces/AMDGPU/basic.ll
llvm/trunk/test/Transforms/InferAddressSpaces/AMDGPU/icmp.ll
llvm/trunk/test/Transforms/InferAddressSpaces/AMDGPU/infer-address-space.ll
llvm/trunk/test/Transforms/InferAddressSpaces/AMDGPU/infer-addrspacecast.ll
llvm/trunk/test/Transforms/InferAddressSpaces/AMDGPU/infer-getelementptr.ll
llvm/trunk/test/Transforms/InferAddressSpaces/AMDGPU/intrinsics.ll
llvm/trunk/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
llvm/trunk/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions.ll
llvm/trunk/test/Transforms/InferAddressSpaces/AMDGPU/select.ll
llvm/trunk/test/Transforms/InferAddressSpaces/AMDGPU/volatile.ll
llvm/trunk/test/Transforms/LoadStoreVectorizer/AMDGPU/adjust-alloca-alignment.ll
llvm/trunk/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-stores-private.ll
llvm/trunk/test/Transforms/LoopStrengthReduce/AMDGPU/different-addrspace-crash.ll
llvm/trunk/test/Transforms/LoopUnroll/AMDGPU/unroll-for-private.ll
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