[PATCH] D35561: [SelectionDAG] Provide adequate register class for RegisterSDNode

Simon Dardis via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 2 04:38:09 PST 2018

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sdardis added a subscriber: jvesely.
sdardis added a comment.

It appears this also fixes a machine verifier failure in test/CodeGen/AMDGPU/r600.work-item-intrinsics.ll, but I am unsure on the correctness of the changed assembly output. +CC'ing Jan Vesely who provided the test.


https://reviews.llvm.org/D35561

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