[llvm] r324001 - [GlobalISel] Fix assert failure when legalizing non-power-2 loads.

Amara Emerson via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 1 12:47:03 PST 2018


Author: aemerson
Date: Thu Feb  1 12:47:03 2018
New Revision: 324001

URL: http://llvm.org/viewvc/llvm-project?rev=324001&view=rev
Log:
[GlobalISel] Fix assert failure when legalizing non-power-2 loads.

Until we support extending loads properly we're going to fall back for these.
We already handle stores in the same way, so this is just being consistent.

Modified:
    llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll

Modified: llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp?rev=324001&r1=324000&r2=324001&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp Thu Feb  1 12:47:03 2018
@@ -709,9 +709,12 @@ LegalizerHelper::widenScalar(MachineInst
     return Legalized;
   }
   case TargetOpcode::G_LOAD: {
-    assert(alignTo(MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(), 8) ==
-               WideTy.getSizeInBits() &&
-           "illegal to increase number of bytes loaded");
+    // For some types like i24, we might try to widen to i32. To properly handle
+    // this we should be using a dedicated extending load, until then avoid
+    // trying to legalize.
+    if (alignTo(MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(), 8) !=
+        WideTy.getSizeInBits())
+      return UnableToLegalize;
 
     unsigned DstExt = MRI.createGenericVirtualRegister(WideTy);
     MIRBuilder.buildLoad(DstExt, MI.getOperand(1).getReg(),

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll?rev=324001&r1=324000&r2=324001&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll Thu Feb  1 12:47:03 2018
@@ -65,6 +65,16 @@ false:
 
 }
 
+; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: %0:_(s24) = G_LOAD %1:_(p0); mem:LD3[undef](align=1) (in function: odd_type_load)
+; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for odd_type_load
+; FALLBACK-WITH-REPORT-OUT-LABEL: odd_type_load
+define i32 @odd_type_load() {
+entry:
+  %ld = load i24, i24* undef, align 1
+  %cst = zext i24 %ld to i32
+  ret i32 %cst
+}
+
   ; General legalizer inability to handle types whose size wasn't a power of 2.
 ; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: G_STORE %1:_(s42), %0:_(p0); mem:ST6[%addr](align=8) (in function: odd_type)
 ; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for odd_type




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