[PATCH] D42737: [LegalizeDAG] Support expanding condition operand of ISD::SELECT

[Eugene Leviant via Phabricator via llvm-commits]

evgeny777 updated this revision to Diff 132335.
evgeny777 added a reviewer: efriedma.
evgeny777 added a comment.

Addressed review comments. The new version also handles scalar types which size is not power of 2.


https://reviews.llvm.org/D42737

Files:
  lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  test/CodeGen/AArch64/expand-select.ll


Index: test/CodeGen/AArch64/expand-select.ll
===================================================================
--- test/CodeGen/AArch64/expand-select.ll
+++ test/CodeGen/AArch64/expand-select.ll
@@ -0,0 +1,23 @@
+; REQUIRES: asserts
+
+; Check that we don't crash
+; RUN: llc -mtriple=aarch64-unknown-linux-gnu -O3 %s -o -
+
+define void @foo(i32 %In1, <2 x i128> %In2, <2 x i128> %In3, <2 x i128> *%Out) {
+  %cond = and i32 %In1, 1
+  %cbool = icmp eq i32 %cond, 0
+  %res = select i1 %cbool, <2 x i128> %In2, <2 x i128> %In3
+  store <2 x i128> %res, <2 x i128> *%Out
+ 
+  ret void
+}
+
+; Check case when scalar size is not power of 2.
+define void @bar(i32 %In1, <2 x i96> %In2, <2 x i96> %In3, <2 x i96> *%Out) {
+  %cond = and i32 %In1, 1
+  %cbool = icmp eq i32 %cond, 0
+  %res = select i1 %cbool, <2 x i96> %In2, <2 x i96> %In3
+  store <2 x i96> %res, <2 x i96> *%Out
+ 
+  ret void
+}
Index: lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -343,8 +343,8 @@
       ScalarBool = TargetLowering::UndefinedBooleanContent;
   }
 
+  EVT CondVT = Cond.getValueType();
   if (ScalarBool != VecBool) {
-    EVT CondVT = Cond.getValueType();
     switch (ScalarBool) {
       case TargetLowering::UndefinedBooleanContent:
         break;
@@ -365,6 +365,11 @@
     }
   }
 
+  // Truncate the condition if needed
+  auto BoolVT = getSetCCResultType(CondVT);
+  if (BoolVT.bitsLT(CondVT))
+    Cond = DAG.getNode(ISD::TRUNCATE, SDLoc(N), BoolVT, Cond);
+
   return DAG.getSelect(SDLoc(N),
                        LHS.getValueType(), Cond, LHS,
                        GetScalarizedVector(N->getOperand(2)));


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