[PATCH] D42761: AMDGPU: Fix missing SCC def from s_xor_b64_term

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added a reviewer: nhaehnle.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, wdng, kzhuravl.

https://reviews.llvm.org/D42761

Files:
  lib/Target/AMDGPU/SIInstructions.td


Index: lib/Target/AMDGPU/SIInstructions.td
===================================================================
--- lib/Target/AMDGPU/SIInstructions.td
+++ lib/Target/AMDGPU/SIInstructions.td
@@ -186,6 +186,7 @@
   let SALU = 1;
   let isAsCheapAsAMove = 1;
   let isTerminator = 1;
+  let Defs = [SCC];
 }
 
 def S_ANDN2_B64_term : PseudoInstSI<(outs SReg_64:$dst),


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D42761.132258.patch
Type: text/x-patch
Size: 366 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180131/d3afe759/attachment.bin>